MX350602B - Low density parity check encoder having length of 64800 and code rate of 7/15, and low density parity check encoding method using the same. - Google Patents
Low density parity check encoder having length of 64800 and code rate of 7/15, and low density parity check encoding method using the same.Info
- Publication number
- MX350602B MX350602B MX2014012121A MX2014012121A MX350602B MX 350602 B MX350602 B MX 350602B MX 2014012121 A MX2014012121 A MX 2014012121A MX 2014012121 A MX2014012121 A MX 2014012121A MX 350602 B MX350602 B MX 350602B
- Authority
- MX
- Mexico
- Prior art keywords
- parity check
- low density
- density parity
- ldpc
- length
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
- H04L1/0043—Realisations of complexity reduction techniques, e.g. use of look-up tables
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Multimedia (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
Abstract
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 7/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20130119514 | 2013-10-07 | ||
KR20130120573 | 2013-10-10 | ||
KR20130149478 | 2013-12-03 | ||
KR1020140120015A KR102184834B1 (en) | 2013-10-07 | 2014-09-11 | Low density parity check encoder with 64800 length and 7/15 rate, and method using the same |
Publications (2)
Publication Number | Publication Date |
---|---|
MX2014012121A MX2014012121A (en) | 2015-08-19 |
MX350602B true MX350602B (en) | 2017-09-11 |
Family
ID=53032004
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2014012121A MX350602B (en) | 2013-10-07 | 2014-10-07 | Low density parity check encoder having length of 64800 and code rate of 7/15, and low density parity check encoding method using the same. |
Country Status (2)
Country | Link |
---|---|
KR (3) | KR102184834B1 (en) |
MX (1) | MX350602B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102397896B1 (en) * | 2015-05-29 | 2022-05-13 | 삼성전자주식회사 | Receiver and signal processing method thereof |
KR20170083432A (en) | 2016-01-08 | 2017-07-18 | 삼성전자주식회사 | Apparatus and method for transmitting and receiving signal in communication system supporting rate compatible low density parity check code |
-
2014
- 2014-09-11 KR KR1020140120015A patent/KR102184834B1/en active IP Right Grant
- 2014-10-07 MX MX2014012121A patent/MX350602B/en active IP Right Grant
-
2020
- 2020-11-24 KR KR1020200159307A patent/KR102312425B1/en active Application Filing
-
2021
- 2021-10-06 KR KR1020210132554A patent/KR102506681B1/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
KR102312425B1 (en) | 2021-10-15 |
KR20210124160A (en) | 2021-10-14 |
KR102184834B1 (en) | 2020-12-01 |
KR20150040740A (en) | 2015-04-15 |
KR102506681B1 (en) | 2023-03-07 |
KR20200136343A (en) | 2020-12-07 |
MX2014012121A (en) | 2015-08-19 |
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