MX371420B - Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same. - Google Patents

Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same.

Info

Publication number
MX371420B
MX371420B MX2017011564A MX2017011564A MX371420B MX 371420 B MX371420 B MX 371420B MX 2017011564 A MX2017011564 A MX 2017011564A MX 2017011564 A MX2017011564 A MX 2017011564A MX 371420 B MX371420 B MX 371420B
Authority
MX
Mexico
Prior art keywords
parity check
low density
density parity
ldpc
length
Prior art date
Application number
MX2017011564A
Other languages
Spanish (es)
Inventor
Sung-Ik Park
Heung-Mook Kim
Sun-Hyoung Kwon
Nam-Ho Hur
Original Assignee
Electronics & Telecommunications Res Inst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Electronics & Telecommunications Res Inst filed Critical Electronics & Telecommunications Res Inst
Publication of MX371420B publication Critical patent/MX371420B/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H04L1/0043—Realisations of complexity reduction techniques, e.g. use of look-up tables

Abstract

A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 5/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
MX2017011564A 2014-08-14 2014-10-07 Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same. MX371420B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20140106181 2014-08-14
KR1020140117504A KR102184822B1 (en) 2014-08-14 2014-09-04 Low density parity check encoder with 64800 length and 5/15 rate, and method using the same

Publications (1)

Publication Number Publication Date
MX371420B true MX371420B (en) 2020-01-29

Family

ID=55449738

Family Applications (2)

Application Number Title Priority Date Filing Date
MX2017011564A MX371420B (en) 2014-08-14 2014-10-07 Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same.
MX2014012119A MX350603B (en) 2014-08-14 2014-10-07 Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same.

Family Applications After (1)

Application Number Title Priority Date Filing Date
MX2014012119A MX350603B (en) 2014-08-14 2014-10-07 Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same.

Country Status (2)

Country Link
KR (3) KR102184822B1 (en)
MX (2) MX371420B (en)

Also Published As

Publication number Publication date
MX350603B (en) 2017-09-08
KR102184822B1 (en) 2020-12-01
KR102506685B1 (en) 2023-03-07
KR20200136338A (en) 2020-12-07
KR20210125960A (en) 2021-10-19
MX2014012119A (en) 2016-02-15
KR20160020989A (en) 2016-02-24
KR102312439B1 (en) 2021-10-15

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