MD1323Z - Bridge inverter - Google Patents

Bridge inverter Download PDF

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Publication number
MD1323Z
MD1323Z MDS20180062A MDS20180062A MD1323Z MD 1323 Z MD1323 Z MD 1323Z MD S20180062 A MDS20180062 A MD S20180062A MD S20180062 A MDS20180062 A MD S20180062A MD 1323 Z MD1323 Z MD 1323Z
Authority
MD
Moldova
Prior art keywords
field
effect transistor
lead
drivers
driver
Prior art date
Application number
MDS20180062A
Other languages
Romanian (ro)
Russian (ru)
Inventor
Юрий САИНСУС
Алексей КОНЕВ
Юрий РУССЕВ
Анатолие СИДОРЕНКО
Original Assignee
ИНСТИТУТ ЭЛЕКТРОННОЙ ИНЖЕНЕРИИ И НАНОТЕХНОЛОГИЙ "D. Ghitu"
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ИНСТИТУТ ЭЛЕКТРОННОЙ ИНЖЕНЕРИИ И НАНОТЕХНОЛОГИЙ "D. Ghitu" filed Critical ИНСТИТУТ ЭЛЕКТРОННОЙ ИНЖЕНЕРИИ И НАНОТЕХНОЛОГИЙ "D. Ghitu"
Priority to MDS20180062A priority Critical patent/MD1323Z8/en
Publication of MD1323Y publication Critical patent/MD1323Y/en
Publication of MD1323Z publication Critical patent/MD1323Z/en
Publication of MD1323Z8 publication Critical patent/MD1323Z8/en

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  • Inverter Devices (AREA)

Abstract

The invention relates to the field of electrical engineering, in particular to inverters made on the basis of transistors.The bridge inverter comprises a voltage input terminal (U), connected to the positive pole of a capacitor (C1), the drains of field-effect transistors (Q1, Q2) and to the input of a power supply (1), the output of which is connected to the inputs of a pulse generator (2) and of drivers (3, 4), while the outputs of the pulse generator (2) are connected, respectively, to the inputs of the drivers (3, 4), a voltage output terminal (U/2), connected to the positive pole of a capacitor (C2), and to the middle lead of a power transformer (Tr), consisting of two identical windings (W1, W2), while the lower lead of the power supply (1) is connected to the lower lead of the pulse generator (2), the lower leads of the drivers (3, 4), one of the outputs of the drivers (3, 4), sources of field-effect transistors (Q3, Q4), negative poles of the capacitors (C1, C2) and to a common terminal (COM). The drain of the field-effect transistor (Q3) is connected to the lead of the winding (W2), one output of the driver (4) and to the source of the field-effect transistor (Q2), the drain of the field-effect transistor (Q4) is connected to the lead of the winding (W1), one output of the driver (3) and to the source of the field-effect transistor (Q1). At the same time, the other two outputs of the driver (3) are connected to the gate of the field-effect transistor (Q1) and the gate of the field-effect transistor (Q3), respectively, and the other two outputs of the driver (4) are connected to the gate of the field-effect transistor (Q2) and the gate of the field-effect transistor (Q4), respectively.
MDS20180062A 2018-06-25 2018-06-25 Bridge inverter MD1323Z8 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
MDS20180062A MD1323Z8 (en) 2018-06-25 2018-06-25 Bridge inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MDS20180062A MD1323Z8 (en) 2018-06-25 2018-06-25 Bridge inverter

Publications (3)

Publication Number Publication Date
MD1323Y MD1323Y (en) 2019-02-28
MD1323Z true MD1323Z (en) 2019-09-30
MD1323Z8 MD1323Z8 (en) 2024-01-31

Family

ID=65588882

Family Applications (1)

Application Number Title Priority Date Filing Date
MDS20180062A MD1323Z8 (en) 2018-06-25 2018-06-25 Bridge inverter

Country Status (1)

Country Link
MD (1) MD1323Z8 (en)

Also Published As

Publication number Publication date
MD1323Z8 (en) 2024-01-31
MD1323Y (en) 2019-02-28

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Legal Events

Date Code Title Description
FG9Y Short term patent issued
KA4Y Short-term patent lapsed due to non-payment of fees (with right of restoration)