MD1309Z - Bridge inverter - Google Patents

Bridge inverter Download PDF

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Publication number
MD1309Z
MD1309Z MDS20180061A MDS20180061A MD1309Z MD 1309 Z MD1309 Z MD 1309Z MD S20180061 A MDS20180061 A MD S20180061A MD S20180061 A MDS20180061 A MD S20180061A MD 1309 Z MD1309 Z MD 1309Z
Authority
MD
Moldova
Prior art keywords
field
effect transistor
drivers
driver
gate
Prior art date
Application number
MDS20180061A
Other languages
Romanian (ro)
Russian (ru)
Inventor
Юрий САИНСУС
Алексей КОНЕВ
Юрий РУССЕВ
Анатолие СИДОРЕНКО
Original Assignee
ИНСТИТУТ ЭЛЕКТРОННОЙ ИНЖЕНЕРИИ И НАНОТЕХНОЛОГИЙ "D. Ghitu"
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ИНСТИТУТ ЭЛЕКТРОННОЙ ИНЖЕНЕРИИ И НАНОТЕХНОЛОГИЙ "D. Ghitu" filed Critical ИНСТИТУТ ЭЛЕКТРОННОЙ ИНЖЕНЕРИИ И НАНОТЕХНОЛОГИЙ "D. Ghitu"
Priority to MDS20180061A priority Critical patent/MD1309Z8/en
Publication of MD1309Y publication Critical patent/MD1309Y/en
Publication of MD1309Z publication Critical patent/MD1309Z/en
Publication of MD1309Z8 publication Critical patent/MD1309Z8/en

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  • Inverter Devices (AREA)

Abstract

The invention relates to the field of electrical engineering, in particular to inverters made on the basis of transistors.The bridge inverter comprises a voltage terminal (U), connected to the positive pole of a capacitor (C1), to the middle terminal of a power transformer (Tr), consisting of two identical windings (W1, W2), and to the input of a power supply (1), the output of which is connected to the inputs of a pulse generator (2) and of drivers (3, 4), at the same time the outputs of the pulse generator (2) are connected, respectively, to the inputs of the drivers (3, 4), a voltage terminal (2U), connected to the positive pole of a capacitor (C2) and to the drains of field-effect transistors (Q1, Q2), at the same time the lower lead of the power supply is connected to the lower lead of the pulse generator (2), the lower leads of the drivers (3, 4), one of the outputs of the drivers (3, 4), sources of field-effect transistors (Q3, Q4), negative poles of the capacitors (C1, C2 ) and to a common terminal (COM). The drain of the field-effect transistor (Q3) is connected to the lead of the winding (W2), one output of the driver (4) and to the source of the field-effect transistor (Q2), and the drain of the field-effect transistor (Q4) is connected to the lead of the winding (W1), one output of the driver (3) and to the source of the field-effect transistor (Q1). At the same time, the other two outputs of the driver (3) are connected to the gate of the field-effect transistor (Q1) and the gate of the field-effect transistor (Q3), respectively, and the other two outputs of the driver (4) are connected to the gate of the field-effect transistor (Q2) and the gate of the field-effect transistor (Q4), respectively.
MDS20180061A 2018-06-21 2018-06-21 Bridge inverter MD1309Z8 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
MDS20180061A MD1309Z8 (en) 2018-06-21 2018-06-21 Bridge inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MDS20180061A MD1309Z8 (en) 2018-06-21 2018-06-21 Bridge inverter

Publications (3)

Publication Number Publication Date
MD1309Y MD1309Y (en) 2019-01-31
MD1309Z true MD1309Z (en) 2019-08-31
MD1309Z8 MD1309Z8 (en) 2024-01-31

Family

ID=65228156

Family Applications (1)

Application Number Title Priority Date Filing Date
MDS20180061A MD1309Z8 (en) 2018-06-21 2018-06-21 Bridge inverter

Country Status (1)

Country Link
MD (1) MD1309Z8 (en)

Also Published As

Publication number Publication date
MD1309Z8 (en) 2024-01-31
MD1309Y (en) 2019-01-31

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Legal Events

Date Code Title Description
FG9Y Short term patent issued
KA4Y Short-term patent lapsed due to non-payment of fees (with right of restoration)