MA44946B1 - High speed fully digital receiver calibration system and method based on interlaced coding - Google Patents
High speed fully digital receiver calibration system and method based on interlaced codingInfo
- Publication number
- MA44946B1 MA44946B1 MA44946A MA44946A MA44946B1 MA 44946 B1 MA44946 B1 MA 44946B1 MA 44946 A MA44946 A MA 44946A MA 44946 A MA44946 A MA 44946A MA 44946 B1 MA44946 B1 MA 44946B1
- Authority
- MA
- Morocco
- Prior art keywords
- transmitter
- receiver
- baseband signals
- interlaced
- operating state
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
- H04L1/0038—Blind format detection
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0046—Code rate detection or code type detection
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Quality & Reliability (AREA)
- Analogue/Digital Conversion (AREA)
- Time-Division Multiplex Systems (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
La présente invention se rapporte au domaine des communications. L'invention concerne un système et un procédé d'étalonnage de récepteur entièrement numérique à grande vitesse fondés sur un codage entrelacé. Le système comprend un émetteur et un récepteur. L'émetteur comprend un démultiplexeur, un processeur de signal de bande de base, un dispositif de retournement et un multiplexeur. Le procédé d'étalonnage comprend les étapes suivantes : l'émetteur est démarré et des signaux de bande de base sont codés d'une manière entrelacée pendant un état initial de l'émetteur ; l'émetteur entre dans un état de fonctionnement normal et les signaux de bande de base sont codés normalement pendant l'état de fonctionnement normal de l'émetteur ; le récepteur effectue un traitement de signal numérique sur des signaux reçus afin d'obtenir des signaux de bande de base démodulés et vérifie en continu si les signaux de bande de base sont codés normalement ou d'une manière entrelacée ; après l'achèvement de l'étalonnage fin d'un convertisseur analogique-numérique (can) du récepteur, le récepteur entre dans l'état de fonctionnement normal. Selon la présente invention, un récepteur peut apprendre l'état de fonctionnement d'un émetteur et l'obtention par le récepteur de performances optimales peut être garantie.The present invention relates to the field of communications. A high speed fully digital receiver calibration system and method based on interlaced coding is disclosed. The system includes a transmitter and a receiver. The transmitter includes a demultiplexer, a baseband signal processor, an inverter, and a multiplexer. The calibration method comprises the following steps: the transmitter is started and baseband signals are encoded in an interlaced fashion during an initial state of the transmitter; the transmitter enters a normal operating state and the baseband signals are encoded normally during the normal operating state of the transmitter; the receiver performs digital signal processing on received signals to obtain demodulated baseband signals and continuously checks whether the baseband signals are encoded normally or in an interlaced manner; After the completion of the fine calibration of an analog-to-digital converter (CAN) of the receiver, the receiver enters the normal working state. According to the present invention, a receiver can learn the operating state of a transmitter, and the receiver's achievement of optimum performance can be guaranteed.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710154691.4A CN106953715B (en) | 2017-03-15 | 2017-03-15 | High speed all-digital receiver calibration system and method based on interleaved code |
PCT/CN2017/109844 WO2018166222A1 (en) | 2017-03-15 | 2017-11-08 | High-speed fully-digital receiver calibration system and method based on interleaved encoding |
Publications (2)
Publication Number | Publication Date |
---|---|
MA44946A1 MA44946A1 (en) | 2019-06-28 |
MA44946B1 true MA44946B1 (en) | 2019-10-31 |
Family
ID=59472041
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MA44946A MA44946B1 (en) | 2017-03-15 | 2017-11-08 | High speed fully digital receiver calibration system and method based on interlaced coding |
Country Status (5)
Country | Link |
---|---|
CN (1) | CN106953715B (en) |
BR (1) | BR112019005321A2 (en) |
MA (1) | MA44946B1 (en) |
RU (1) | RU2704238C1 (en) |
WO (1) | WO2018166222A1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106953715B (en) * | 2017-03-15 | 2019-12-03 | 烽火通信科技股份有限公司 | High speed all-digital receiver calibration system and method based on interleaved code |
EP3871027A1 (en) * | 2018-10-23 | 2021-09-01 | Sicoya GmbH | Assembly of network switch asic with optical transceivers |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3221201B2 (en) * | 1994-01-21 | 2001-10-22 | 松下電器産業株式会社 | A / D / D / A converter |
ID27977A (en) * | 1999-07-08 | 2001-05-03 | Samsung Electronics Co Ltd | APARATUS AND METHODS TO CONTROL DEMULTIPLEXORS AND MULTIPLEXORS USED FOR ADJUSTMENT OF SPEED IN MOVING COMMUNICATION SYSTEMS |
WO2007035260A1 (en) * | 2005-09-15 | 2007-03-29 | Analog Devices, Inc. | High speed transmission system |
US20090154575A1 (en) * | 2007-12-12 | 2009-06-18 | Ahmadreza Rofougaran | Method and system for adc calibration in ofdm systems |
RU2385539C1 (en) * | 2008-08-06 | 2010-03-27 | Государственное образовательное учреждение высшего профессионального образования "Воронежский государственный университет" | Method for data transfer in distributed systems of data transfer and device for its realisation |
EP2587754B1 (en) * | 2011-10-25 | 2016-07-06 | Alcatel Lucent | Hierarchical And Adaptive Multi-Carrier Digital Modulation And Demodulation |
CN103475372A (en) * | 2011-12-26 | 2013-12-25 | 陈启星 | Multistep parallel analog-to-digital converter of directly leading top-step potential to calculate secondary input voltage |
US9397786B2 (en) * | 2012-02-20 | 2016-07-19 | Tyco Electronics Subsea Communications Llc | System and method including modified bit-interleaved coded modulation |
CN105024696B (en) * | 2015-07-02 | 2019-06-07 | 大唐微电子技术有限公司 | The calibrating installation and method of multi-channel parallel A/D conversion system sampling time error |
CN106953715B (en) * | 2017-03-15 | 2019-12-03 | 烽火通信科技股份有限公司 | High speed all-digital receiver calibration system and method based on interleaved code |
-
2017
- 2017-03-15 CN CN201710154691.4A patent/CN106953715B/en active Active
- 2017-11-08 WO PCT/CN2017/109844 patent/WO2018166222A1/en active Application Filing
- 2017-11-08 MA MA44946A patent/MA44946B1/en unknown
- 2017-11-08 RU RU2019107536A patent/RU2704238C1/en active
- 2017-11-08 BR BR112019005321A patent/BR112019005321A2/en unknown
Also Published As
Publication number | Publication date |
---|---|
RU2704238C1 (en) | 2019-10-25 |
MA44946A1 (en) | 2019-06-28 |
CN106953715B (en) | 2019-12-03 |
BR112019005321A2 (en) | 2019-10-01 |
CN106953715A (en) | 2017-07-14 |
WO2018166222A1 (en) | 2018-09-20 |
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