RU2385539C1 - Method for data transfer in distributed systems of data transfer and device for its realisation - Google Patents

Abstract

FIELD: information technologies.

SUBSTANCE: method is realised with the help of device comprising serially connected modules of analog-digital converter, generator of polynomial switches and signals synthesiser on the basis of sinusoidal pulse generator, besides analog-digital converter selects numeration system on the basis of bit errors number in calibration signal.

EFFECT: possibility to increase throughput capacity of data transfer channel as a result of optimisation of amplitude information usage in process of signal coding.

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Description

The invention relates to the field of technology in which data is transmitted over any communication channels (wired and wireless), analog-to-digital and digital-to-analog conversion, and encryption of the transmitted information, and can be used as an additional device that increases the throughput of the communication channel.

The closest prototypes are wireless communication devices based on the WLan 802.11a protocol (US patent 7162270, US patent 7181258 from February 20, 2007). The most functionally close is the device described in patent No. 7181258, which uses the frequency range 2.4-2.5 GHz and the Kama constellation as a signal-code structure. The device and the method of its operation solve the following tasks:

- providing the ability to create wireless networks, control control systems;

- automatic adjustment to the level of interference in the channel used.

This prototype has a number of disadvantages that make it impossible to use this technology in distributed real-time systems:

- when the background noise in the communication channel changes, the device switches from one data representation model to another. These models are calculated in advance and cannot be synthesized during the operation of the device, which leads to irrational use of channel resources;

when switching the operating modes characterizing the level of background noise due to the delay of the statistical analyzer of the training signal, a data packet (group of data packets) appears, with a large number of errors, which is unacceptable when building distributed real-time systems.

The technical result consists in the ability to increase the bandwidth of the data channel by optimizing the use of amplitude information when encoding a signal.

The technical result is achieved by the fact that in the method of constructing distributed data transmission systems, which consists in receiving a calibration signal from a common source and analyzing the number of bit errors, based on the number of these errors, a number system is selected that is most suitable for digitizing a useful signal, knowing the threshold of logical zero and one , the amplitude is quantized and the useful signal is digitized in the selected number system, associating with each bit of information a certain amplitude threshold obtained after bit research is interpolated using any polynomials of known types, after the interpolation, polynomial keys are synthesized, then they are used to encrypt the processed signal, which is a set of coefficients of the encryption polynomial that are transmitted over any available communication channel, and to restore the original signal, it is enough to have one polynomial key.

The proposed method for constructing distributed data transmission systems is devoid of these disadvantages, since the used signal-code constructions are reduced to a robust control system, which can be an automaton with a dynamic number of states.

The described method is applicable to the class of composite data reception / transmission devices used for secure mobile navigation, tracking and control systems.

The proposed method can be represented in several stages:

1) collecting information about the status of the channel;

2) the choice of the most suitable alphabet for the amplitude ADC;

3) signal encryption after conversion to ADC;

4) data transfer after final processing.

The method of processing data at each stage is determined dynamically, based on the characteristics of the used communication channel, and can be implemented as a separate device.

The applied method of constructing a data transmission system made it possible to increase the channel utilization efficiency, providing higher throughput and reducing the number of errors with a varying level of interference in the channel. Thus, the required technical result was achieved.

The technical result is also achieved by the fact that the device that implements this method consists of sequentially connected modules of an analog-to-digital converter, a polynomial key generator and a signal synthesizer based on a sinusoidal pulse generator, and the analog-to-digital converter selects a number system based on the number of bit errors in calibration signal.

Figure 1 presents a standard binary signal; figure 2 - the resulting binary signal; figure 3 is a diagram of an experimental sample; figure 4 is a schematic view of the signal in each block; figure 5 is a General diagram of the interaction of the device modules; figure 6 - ADC with parallel calibration; 7 is a diagram of an encryption module; in Fig.8 - data transmission module; figure 9 is a table. The list of algorithm parameters.

The proposed method is applicable either in low-noise channels or in cable protected systems from interference. When applying it, one can take into account the dynamic (non-Gaussian) noise level in various parts of the spectrum.

All transmitting devices are divided into two categories: analog and digital. Since absolutely all of the existing digital computers operate in the binary system (i.e., in the field of standard Boolean logic, where there are only two stable states "1" and "0"), digital transceivers are also binary .

When using fixed-length packet data algorithms, any gain in channel capacity has always been reduced to the use of new information compression algorithms. However, an increase in the amount of information transmitted per unit of time can also be achieved by interleaving from one alphabet of transmitted messages (in our case, binary), to an alphabet with a wider base (the basis of the calculus system). The effect of increasing the throughput is achieved due to the fact that during the conversion of the transmitted message from one alphabet to another, there is an actual decrease in the number of bits, and therefore, more information can be transmitted over the same abstract period of time.

Example

Let the standard signal transmission alphabet A = {0,1} and the extended B = {0,1,2} be given; t is the time interval during which one of the elementary pulses is transmitted. Let the number 7 ₍₁₀₎ be useful information that must be transmitted from the source to the recipient.

When using the standard alphabet A, we have: 7 ₍₁₀₎ = 111 ₍₂₎ , i.e. we have a number consisting of three digits, which means it takes 3t time intervals to transmit it (as shown in Fig. 1).

When switching to the alphabet B, we have: 7 ₍₁₀₎ = 21 ₍₃₎ , i.e. we have a number consisting of two digits, which means it takes 2t time intervals to transmit it (Fig. 2).

Thus, a gain in time was obtained when transmitting the same message in the alphabet B, which means increased channel throughput.

Since the increase in the amount of transmitted data occurs due to amplitude information, with an increase in bit depth, there is an increase in the sensitivity of the transceiver system to noise.

When applying this algorithm in noise-protected cable systems, any hardware-permissible bit depth can be used, however, when constructing the ADC for radio devices on this algorithm, to select the coding bit length, it is necessary to take into account the number of errors in the channel [4].

Thus, even at the stage of analog-to-digital conversion, it is possible to increase the channel capacity without using any compression methods.

A digital generator of sinusoidal oscillations acts as a synthesizer of elementary signals, each clock cycle of which corresponds to one half-cycle of a sinusoid. A diagram of such a generator is shown in FIG. 3. The following is an experimental sample. The clock generator (GTI) 1 - provides the formation of control pulses of a given frequency, providing the desired sine frequency at the output;

counter 2 generates a current address for selecting data from memory;

ROM 3 provides the current value of the output signal level;

digital-to-analog converter (DAC) 4 converts the digital value of the signal level into an analog signal level;

BU 5 - provides the necessary amplitude of the output signal.

Schematically, the signal in each block is shown in Fig.4.

GTI 1 generates reference pulses with a frequency directly proportional to the output frequency of the sine. Synchronizing pulses with a frequency f _{T are} supplied to counter 2, the output of which is formed by an n-bit address of the memory chip - the number X. The value of the address varies from 0 to (2 ⁿ -1) [3]. According to the number X at the address input of the ROM 3 selects the m-bit number Y, which is the value of the signal sample - the amplitude of the sine. The digital-to-analog converter 4 converts the number code into an analog signal [2]. The control unit 5 provides the necessary amplitude of the output signal.

In general, the dependence of the output voltage U of the _{DAC of a} bipolar DAC on the input code of the number X at the reference voltage U of the _OP is expressed by

The maximum frequency of the generated signals is determined by the formula

The total approximation error of the sinusoid is the sum of the quantization error of the signal by level, the sampling error of the signal by time, and the linearity error of the DAC.

Key generation

The encryption method used in the invention is based on the generation of public and private key pairs obtained using high degree polynomials.

All operations necessary for the synthesis of encryption keys are carried out in the ring R of “reduced” polynomials of degree n-1, having integer coefficients:

The summation of polynomials occurs in the usual way.

Also, the usual operation of multiplication is used, except that with members of the polynomial whose degree is higher than N there are a number of substitutions:

To increase the number of components of the polynomial, in the ring R, in addition to the number N, which determines the degree of polynomials, linear components can be added. The main objects of the algorithm are presented in the table in Fig.9.

To guarantee safety, it is desirable that p and q do not have any common factors.

As mentioned above, the hardware of the radio complex consists of three parts: the ADC module 6, the encryption module 7, and the data transmission module 8.

The general diagram of the device is presented in figure 5:

The main modules that make up the device are connected in series. The original product (the signal to be transmitted) passes the analog-to-digital conversion stage in module 6, after which it passes the approximation and encryption step using polynomial keys in module 7. In module 8, the final product is transmitted over the air.

ADC module

A module 6 performing analog-to-digital conversion with calibration is depicted in FIG. 6.

The calibration mechanism is based on a calibration signal receiver 9, a unit for recording a reference calibration signal 10 and a signal comparison device 11, the product of which is a quantity characterizing the deviation of the received signal from the reference. By the deviation of one signal from another is understood the coefficient of bit errors.

Decision maker 12 is mounted on two selectors 13 and 14. Selector 13 initializes the output ports of the digitized signal, while 14 sets the clock ticks of timer 15.

The timer 15 (device T1) is a clock generator, on the basis of which the quantizer 16 quantizes the original analog signal. Also on the basis of these pulses 16 decides on the choice of the optimal coding alphabet and converts the signal into the form described above. After performing these steps, the digitized signal is fed to the asynchronous output device 17, where its further processing is carried out by the encryption module 7.

Encryption module

The structure of this module is shown in Fig.7.

During activation of the radio complex, using the selector 18, the bit depths of the keys 19 and 20 are selected. The bit depth is the length of the encryption polynomials from the ring R. Then, when the encoded signal from the ADC module 6 arrives at the conversion device 21, the encoded signal is encrypted and approximated using the prepared polynomials . After this stage, relevant information (polynomial coefficients) is supplied to the asynchronous output device 22 and its further processing is carried out using the data transmission module.

Data transfer module

The block diagram of the data transmission module is shown in Fig. 8.

The basis of this module is a device for generating sinusoidal oscillations (figure 3). The encrypted signal is fed to the conveyor 23, and then to the synthesizer 24, where, depending on the received number and the selected time interval, two coefficients k1 26 and k2 27 are selected for the timer 25 (stretching / compression coefficients of the generated sinusoid fragment along the abscissa and ordinates).

Thus, the control of signal synthesis is reduced to the selection of the coefficients k1 and k2 based on information about the time interval of the device T1, the selected bit depth, the level of interference, and the number received from the conveyor.

Literature

1. B.C. Yatsenov - Microchip rfPIC microcontrollers.

2. The practice of analog modeling of dynamic circuits (Tetelbaum IM, Schneider Yu.R.).

3. Microprocessors in questions and answers (Wood Alec).

4. Small-sized VHF receiver (N. Vorobyov).

5. Debugging microprocessor systems (Williams GB).

6. Radio transmitting devices (Shumilin MS, Golovin OV, Sevalnev VP, Shevtsov EA).

7. Microprocessors (Shileyko A.V., Shileyko T.I.).

8. Design of radio transmitting devices (Shahgildyan VV).

9. Design of radio transmitters (Shahgildyan VV).

10. Design of radio receivers (Sivere A.P. and others).

Claims (2)

1. The method of data transmission in distributed data transmission systems, which consists in receiving a calibration signal from a common source and analyzing the number of bit errors, based on the number of these errors, a number system is selected that is most suitable for digitizing a useful signal, knowing the threshold of logical zero and one, quantization is performed amplitude and digitization of the useful signal in the selected number system, matching each bit of information with a certain amplitude threshold, the resulting sequence of bits is interpolated I use any polynomials of known types, after the interpolation, the polynomial keys are synthesized, then they are used to encrypt the processed signal, which is a set of coefficients of the encryption polynomial that are transmitted over any available communication channel, and to restore the original signal, it is enough to have one key -polynomial. 2. A device for transmitting data in distributed data transmission systems consists of series-connected modules of an analog-to-digital converter, a polynomial key generator and a signal synthesizer based on a sinusoidal pulse generator, and the analog-to-digital converter selects a number system based on the number of bit errors in the calibration signal .

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