LU101366B1 - NxM DRA-based NMOSFET terahertz array detector and method of designing antenna - Google Patents

NxM DRA-based NMOSFET terahertz array detector and method of designing antenna Download PDF

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LU101366B1
LU101366B1 LU101366A LU101366A LU101366B1 LU 101366 B1 LU101366 B1 LU 101366B1 LU 101366 A LU101366 A LU 101366A LU 101366 A LU101366 A LU 101366A LU 101366 B1 LU101366 B1 LU 101366B1
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terahertz
chip
resistor
detector
nmosfet
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LU101366A
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German (de)
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Jianguo Ma
Shaohua Zhou
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Univ Guangdong Technology
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01JMEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00Photometry, e.g. photographic exposure meter
    • G01J1/42Photometry, e.g. photographic exposure meter using electric radiation detectors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00Antenna arrays or systems
    • H01Q21/06Arrays of individually energised antenna units similarly polarised and spaced apart
    • H01Q21/061Two dimensional planar arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q9/00Electrically-short antennas having dimensions not more than twice the operating wavelength and consisting of conductive active radiating elements
    • H01Q9/04Resonant antennas
    • H01Q9/0485Dielectric resonator antennas
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

The present invention discloses an NxM DRA-based NMOSFET terahertz array detector. The NxM terahertz detector array is connected to one end of a first DC blocking capacitor, the other end of the first DC blocking capacitor is connected to one end of a second bias resistor, and the other end of the second bias resistor is connected to a second bias voltage; the second bias resistor is further connected to a positive electrode of a low noise preamplifier; two ends of a first resistor is connected to a negative electrode and an output electrode of the low noise preamplifier, respectively; one end of the first resistor is further connected to one end of a second resistor, the other end of the second resistor is connected to one end of a second DC blocking capacitor, and the other end of the second DC blocking capacitor is grounded; and the other end of the first resistor is connected to one end of a third DC blocking capacitor, and the other end of the third DC blocking capacitor is grounded. The present invention also proposes a method for designing an antenna. Compared with the prior art, the technical solution of the present invention effectively improves the imaging resolution of the terahertz detector.

Description

BL-5103 LU101366 NxM DRA-BASED NMOSFET TERAHERTZ ARRAY
DETECTOR AND METHOD OF DESIGNING ANTENNA Technical field The present invention relates to the technical field of terahertz detectors, in particular to an NxM DRA-based NMOSFET terahertz array detector and a method of designing an antenna.
Technical background Terahertz (THz) waves usually refer to electromagnetic waves with a frequency between 0.1 and 10 THz (the wavelength of 0.03 to 3 mm). The terahertz waves are between microwaves and infrared rays, and are also referred to as T-rays. Within a long period of time, due to the lack of high-transmission-power terahertz radiation sources and high-performance terahertz detectors, the research progress of the terahertz technology was relatively lagging, and thus it was called a “terahertz gap".
In recent years, due to the rapid development of millimeter wave technology and infrared light technology, the terahertz technology has attracted more and more attention and research. At present, the terahertz technology and its application have become a research hotspot in the scientific community. Terahertz waves have many unique features, such as high penetration, high spatial resolution, high security, and capability of carrying a large amount of information, so that they have great research value and broad application prospects in the fields of broadband communication, biomedical, security detection, radio astronomy, etc.
An important application field for extension of the terahertz technology is the terahertz imaging technology, and the generation and detection of terahertz waves are indispensable for terahertz imaging. Therefore, research and application development of the terahertz imaging technology is currently a hot research topic.
| i 2 BL-5103 LU101366 In recent years, the terahertz detection and imaging based on NMOSFETs has proven to be very feasible. However, due to the problems such as the low gain and radiation efficiency of conventional terahertz antennas such as on-chip patches, the low imaging resolution of single-pixel NMOSFET terahertz detectors, the sensitivity and imaging resolution based on NMOSFET detection are difficult to meet the practical application requirements. How to solve the above-mentioned technical problems existing in the NMOSFET detection and imaging process, and to improve the detection sensitivity and imaging resolution based on NMOSFET detection is a technical problem that is currently urgently needed to be solved.
Summary of the invention A main object of the present invention is to provide an NxM DRA-based NMOSFET terahertz array detector that operates independently, does not interfere with each other, is sensitive to detection, and has high resolution. The present invention also proposes a method of designing an antenna, which aims to effectively improve the imaging resolution of the terahertz detector. To achieve the above object, the present invention provides an NxM DRA-based NMOSFET terahertz array detector, comprising an NxM terahertz detector array, wherein the NxM terahertz detector array is connected to one end of a first DC blocking capacitor, the other end of the first DC blocking capacitor is connected to one end of a second bias resistor, and the other end of the second bias resistor is connected to a second bias voltage; the second bias resistor is further connected to a positive electrode of a low noise preamplifier; two ends of a first resistor is connected to a negative electrode and an output electrode of the low noise preamplifier, respectively; one end of the first resistor is further connected to one end of a second resistor, the other end of the second resistor is connected to one end of a second DC blocking capacitor, and the other end of the second DC blocking capacitor is grounded; and the other end of the first resistor is connected to one end of a third DC blocking capacitor, and the other end of the third DC blocking capacitor is grounded. Preferably, the NxM terahertz detector array comprises N x M detector units, a third
| | 3 BL-5103 LU101366 bias resistor being simultaneously connected to each detector unit, and the third bias resistor being connected to a third bias voltage. Preferably, the detector unit comprises a DRA-based NMOSFET terahertz detector and an NMOSFET connected thereto; the DRA-based NMOSFET terahertz detector specifically includes an on-chip terahertz DRA dielectric resonant antenna, a matching network MN and a first NMOSFET that are connected in order; the first NMOSFET is further simultaneously connected to the first bias resistor and an open-circuit quarter-wavelength third microstrip transmission line; and the first bias resistor is further connected to a first bias voltage, and the NMOSFET is connected to an SEL terminal and a Vout terminal. Preferably, the matching network MN is composed of a first microstrip transmission line and a second microstrip transmission line; a left end of the first microstrip transmission line is connected to the dielectric resonant antenna, and the other end of the first microstrip transmission line is connected to a transistor source M1 of the first NMOSFET, and the first microstrip transmission line is further connected to one end of the second microstrip transmission line, and the other end of the second microstrip transmission line is grounded.
Preferably, the dielectric resonant antenna comprises an on-chip H-shaped slot structure and a rectangular dielectric resonator block disposed on the on-chip H-shaped slot structure by an insulating glue layer, and the on-chip H-shaped slot structure is formed on an integrated process top-layer metal.
Preferably, the on-chip H-shaped slot structure is located in a metal cavity formed by stacking intermediate layers of metal other than an integrated process top-layer metal and an integrated process bottom-layer metal in an integrated process and metal vias; the on-chip H-shaped slot structure comprises two vertical slots, a left vertical slot and a right vertical slot, formed in parallel; an inverted L-shaped left slot and an inverted L-shaped right slot are formed on corresponding sides of the left vertical slot and the right vertical slot, respectively; horizontal portions of the inverted L-shaped left slot and the inverted L-shaped right slot are connected in corresponding middle portions of the left vertical slot and the right vertical slot; and
| i 4 BL-5103 LU101366 vertical portions of the inverted L-shaped left slot and the inverted L-shaped right slot are parallel to each other to form two extraction slots connecting the antenna to an external structure.
Preferably, the on-chip H-shaped slot structure is designed and processed by selecting and using a silicon-based process; the insulating glue layer fixes the rectangular dielectric resonator block to an on-chip excitation structure; and the rectangular dielectric resonator block is processed to a specific size by selecting and using an insulating material with a relative dielectric constant and coupled to radiate an electromagnetic field to a space.
Preferably, the rectangular dielectric resonator block is selected as a mode of T Baus the dielectric resonant antenna is designed to have a center frequency of 300 GHz; magnesium oxide having a relative dielectric constant of 9.65 is selected and used as a material of the rectangular dielectric resonator block; and the on-chip structure is designed by selecting and using 0.18mGeSi BiCMOS process (Towerjazz SBC18H3) parameters. The present invention also proposes a method of designing an on-chip terahertz dielectric resonant antenna with respect to the NxM DRA-based NMOSFET terahertz detector, comprising the following steps: step S1: designing a rectangular dielectric resonator block, wherein a resonance mode is in a mode of Tea, and the size of the rectangular dielectric resonator block can be solved by solving a transcendental equation (1): k tan( An) Ce "i -R 2 (1) k= lan fom Tk HZ RA RAR = ek c Lp, 2H, (2) wherein Equation (2) described above is an explanation of parameters of Equation | !
BL-5103 LU101366 (1), where © is the speed of light, and From is an operating frequency of the rectangular dielectric resonator block in this mode, a high-order resonance mode of TEs13 mode is selected and used as the resonance mode of the rectangular dielectric resonator block, and then the transcendental equation (1) is solved by 5 programming with mathematical software Matlab to obtain the size of the rectangular dielectric resonator block; step S2: designing an on-chip excitation structure, wherein in the design process, a top-layer metal Metal6 is selected and used to design a slot structure while a bottom-layer metal Metall is selected and used as a metal floor to suppress an electromagnetic wave from propagating to a silicon-based substrate with a high loss, and intermediate layers of metal and metal vias are stacked to form a metal shielding cavity surrounding the H-shaped slot structure to suppress electromagnetic leakage and reduce a loss, and various size parameters of the H-shaped slot structure are finally determined; step S3: selecting thin insulating glue, wherein thermal stability insulating glue with a relative dielectric constant is selected and used as insulating glue for combining a rectangular dielectric resonator block and the on-chip H-shaped slot structure; andstep S4: simulating the on-chip terahertz DRA using high-frequency structure simulation analysis software.
The technical solution of the present invention has the following advantages over the prior art: The technical solution of the present invention combines a rectangular dielectric resonator block with a high-order mode of TEs13 mode having a low-loss characteristic and an on-chip slot feed structure, thereby effectively soiving the technical problem of the low gain and radiation efficiency existing in designing the on-chip terahertz antenna.
Compared with conventional NMOSFET terahertz detectors based on terahertz antennas such as on-chip patches, higher gain and radiation efficiency of on-chip terahertz antennas can be achieved and detection
BL-5103 LU101366 sensitivity of terahertz detectors can be improved. In addition, the technical solution of the present invention proposes an NxM DRA-based NMOSFET terahertz detector array on the basis of a single-pixel DRA-based NMOSFET terahertz detector, and achieves precise control of the actual number of operating pixel units by a row selection control switch and a column selection control switch, and each pixel unit remains independent to operate and does not interfere with each other, ultimately effectively improving the imaging resolution of the terahertz detector. At the same time, in the DRA-based NMOSFET terahertz array detector of the technical solution of the present invention, the width-to-length ratio W/L of the NMOSFET may be the same, or may be different, thereby achieving the NMOSFET switching function in a single detector unit.
The on-chip terahertz DRA according to the technical solution of the present invention is compared with a conventional terahertz antenna such as an on-chip patch, the dielectric resonator block in the on-chip terahertz DRA of the technical solution of the present invention has a low-loss characteristic, which can effectively improve the problem of large loss of the on-chip terahertz antenna. By allowing the electromagnetic energy in the space to be coupled to the dielectric resonator block with a low-loss characteristic through the on-chip structure, the problem of large loss of the on-chip terahertz antenna is effectively improved, the radiation efficiency and gain of the on-chip terahertz antenna are improved, and the detection sensitivity of the NMOSFET-based detection is finally improved. Therefore, the technical solution of the present invention introduces an on-chip terahertz DRA and a terahertz detector array into NMOSFET-based terahertz detection and imaging. Compared with the conventional NMOSFET terahertz detectors based on terahertz antennas such as patches, higher gain and radiation efficiency of on-chip terahertz antennas are achieved and detection sensitivity of terahertz detectors is improved; and compared with single-pixel NMOSFET terahertz detectors, NxM pixel NMOSFET terahertz detectors can achieve a higher imaging resolution.
Brief description of the drawings | |
| 7 BL-5103 LU101366 In order to more clearly illustrate the technical solutions in embodiments of the present invention or the prior art, the accompanying drawings needed to be used in the description of the embodiments or the prior art will be briefly described below.
Obviously, the accompanying drawings in the following description are only some embodiments of the present invention, and other accompanying drawings can be obtained by a person ordinarily skilled in the art from the structures illustrated in these accompanying drawings without any inventive efforts.
Fig. 1 is a schematic structural view of an NxM DRA-based NMOSFET terahertz array detector of the present invention; Fig. 2 is a schematic structural view of an NxM terahertz detector array of the present invention; Fig. 3 is a schematic structural view of an on-chip terahertz DRA of the present invention; Fig. 4 is a schematic perspective view of a rectangular dielectric resonator block of the present invention;
Fig. 5 is a schematic structural view of an on-chip H-shaped slot structure of the present invention; Fig. 6 is a diagram showing a relationship of a return loss S11 of the on-chip terahertz DRA of the present invention as a function of frequency; Fig. 7 is a diagram showing a relationship of a gain of the on-chip terahertz DRA of the present invention as a function of frequency; and Fig. 8 is a radiation pattern of the on-chip terahertz DRA of the present invention.
Description of the reference numerals: | |
| | 8 BL-5103 LU101366 Reference Name Reference Name ew |e | 1 On-chip H-shaped slot 12 Right vertical slot ae 3 Rectangular dielectric 14 Right slot | mens a TE 4 Integrated process top-layer 15 Metal cavity mat 11 Left vertical slot 101 Integrated process TTT LT res The implementation, functional features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed description of the embodiments The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all the embodiments. All other embodiments obtained by a person ordinarily skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.
It should be noted that if there is a directional indication (such as up, down, left, right, front, back, ...) mentioned in the embodiments of the present invention, the directional indication is only used to explain the relative positional relationship between components, motion status, and the like in a specific posture (as shown in the drawing), and if the specific posture changes, the directional indication also changes accordingly.
In addition, if there is a description of "first", "second", etc. in the embodiments of |
! ! 9 BL-5103 LU101366 the present invention, the description of the "first", "second", etc. is used for the purpose of description only, and is not to be construed as an its relative importance or implicit indication of the number of technical features indicated. Thus, the features defined by "first" or "second" may include at least one of the features, either explicitly or implicitly. In addition, the technical solutions among the various embodiments may be combined with each other, but must be based on the enablement of those skilled in the art, and when the combination of the technical solutions is contradictory or impossible to implement, it should be considered that such combination of the technical solutions does not exist, and is not within the scope of protection claimed by the present invention.
The present invention proposes an NxM DRA-based NMOSFET terahertz array detector.
Referring to Fig. 1, an NxM DRA-based NMOSFET terahertz array detector according to an embodiment of the present invention includes an NxM terahertz detector array, a first DC blocking capacitor C1, a second bias resistor Rb2, and a second bias voltage Vb2 and a voltage feedback loop of a low noise preamplifier. The NxM terahertz detector array is connected to one end of the first DC blocking capacitor C1, the other end of the first DC blocking capacitor C1 is connected to one end of the second bias resistor Rb2, and the other end of the second bias resistor Rb2 is connected to the second bias voltage Vb2; the second bias resistor Rb2 is further connected to a positive electrode of the low noise preamplifier; two ends of a first resistor Rf is connected to a negative electrode and an output electrode of the low noise preamplifier, respectively; one end of the first resistor Rf is further connected to one end of a second resistor Rg, the other end of the second resistor Rg is connected to one end of a second DC blocking capacitor C2, and the other end of the second DC blocking capacitor C2 is grounded; and the other end of the first resistor Rf is connected to one end of a third DC blocking capacitor C3, and the other end of the third DC blocking capacitor C3 is grounded. Referring to Fig. 2, the NxM terahertz detector array of the present embodiment includes NxM detector units (D11, D12, D13, ..., DNM), a third bias resistor Rb3 simultaneously connected to each detector unit, and a third bias voltage Vb3 | |
| | 10 BL-5103 LU101366 electrically connected to the third bias resistor Rb3. The NxM detector units include N row selection control switches (Row1, Row2, Row3, ..., RowN) and M column selection control switches (Column1, Column2, Column3, ..., ColumnM). Preferably, each detector unit of the present embodiment includes a DRA-based NMOSFET terahertz detector and an NMOSFET, and the DRA-based NMOSFET terahertz detector specifically includes an on-chip terahertz DRA dielectric resonant antenna, a matching network MN and a first NMOSFET that are connected in order, wherein the first NMOSFET is further simultaneously connected to the first bias resistor Rb1 and an open-circuit quarter-wavelength third microstrip transmission line TL3; the first bias resistor Rb1 is further connected to a first bias voltage Vb1, wherein the open-circuit quarter-wavelength third microstrip transmission line TL3 is mainly used to eliminate the influence of a gate DC bias on impedance matching between an antenna and a transistor; and the NMOSFET is connected to an SEL terminal and a Vout terminal. More specifically, the matching network MN of the present embodiment is composed of two microstrip transmission lines TL1 and TL2, and the left end of the first microstrip transmission line TL1 is connected to the dielectric resonant antenna of the DDA-based NMOSFET terahertz detector, and the other end of the first microstrip transmission line TL1 is connected to the transistor source M1 of the first NMOSFET. The first microstrip transmission line TL1 is further connected to one end of the second microstrip transmission line TL2, and the other end of the second microstrip transmission line TL2 is grounded. The matching network MN is mainly used to improve the power transfer efficiency between the antenna and the transistor, and provide a DC ground for the transistor source M1 of the first NMOSFET.
As shown in Figs. 3, 4 and 5, the dielectric resonant antenna of the on-chip terahertz DRA proposed in the present invention includes an on-chip H-shaped slot structure 1 and a rectangular dielectric resonator block 3 provided on the on-chip H-shaped slot structure 1 through an insulating glue layer 2, and the on-chip H-shaped slot structure 1 is formed on an integrated process top-layer metal 4. Specifically, the on-chip H-shaped slot structure 1 is located in a metal cavity 15 formed by stacking intermediate layers of metal other than an integrated process top-layer metal 4 and an integrated process bottom-layer metal 101 in an integrated process and metal vias, and the on-chip H-shaped slot structure 1 includes two ; |
BL-5103 LU101366 vertical slots, a left vertical slot 11 and a right vertical slot 12, formed in parallel.
An inverted L-shaped left slot 13 and an inverted L-shaped right slot 14 are formed on corresponding sides of the left vertical slot 11 and the right vertical slot 12, respectively.
Horizontal portions of the inverted L-shaped left slot 13 and the inverted L-shaped right slot 14 are connected in corresponding middle portions of the left vertical slot 11 and the right vertical slot 12, and vertical portions of the inverted L-shaped left slot 13 and the inverted L-shaped right slot 14 are parallel to each other to form two extraction slots connecting the antenna to an external structure.
Preferably, the on-chip H-shaped slot structure 1 of the present embodiment is designed and processed by selecting and using a silicon-based process so as to excite a rectangular dielectric resonator block covering the upper portion thereof and optimize the impedance matching effect, and the insulating glue layer 2 has good thermal stability and can fix the rectangular dielectric resonator block to the on-chip excitation structure.
The rectangular dielectric resonator block 3 is processed to a specific size by selecting and using an insulating material with a larger relative dielectric constant (more preferably, a relative dielectric constant of >5) and coupled to radiate an electromagnetic field to a space.
In the present invention, the rectangular dielectric resonance mode is selected as TEs. mode.
In addition, a center frequency of a dielectric resonant antenna design according to an embodiment of the present invention is 300 GHz, and magnesium oxide having a relative dielectric constant of 9.65 is selected and used as the material of the rectangular dielectric resonator block.
The on-chip structure is designed by selecting and using 0.18mGeSi BICMOS process (Towerjazz SBC18H3) parameters, and there are six layers of metal Metal1-Metal6 and five layers of metal vias Via1-Via5 in this process.
The present invention further proposes a method for designing an on-chip terahertz dielectric resonant antenna, which specifically comprises the following design steps: Step 1: design a rectangular dielectric resonator block, wherein a resonance mode is in a mode of TEs, and the size of the rectangular dielectric resonator block as |
BL-5103 LU101366 shown in Fig. 3 can be solved by solving a transcendental equation (1): k, tan(S om) (Ce “KE Zk 2 (1) k= em Fe en TKR =a 2, c Lor, 2H pp, 2) where Equation (2) described above is the explanation for parameters of Equation (1), wherein © is the speed of light, and om is the operating frequency of the rectangular dielectric resonator block in this mode.
A high-order resonance mode of TEs.15 mode is selected and used as the resonance mode of the rectangular dielectric resonator block, and can have a higher gain than the base mode.
Then, the transcendental equation (1) is solved by programming with the mathematical software Matlab, obtaining the sizes of the rectangular dielectric resonator block at
Step 2: design an on-chip excitation structure, wherein the on-chip H-shaped slot structure is as shown in Fig. 5. In the design process, the top-layer metal Metal6 is selected and used to design the slot structure, while the bottom-layer metal Metal1 is selected and used as the metal floor to suppress the electromagnetic wave from propagating toward a high-loss silicon-based substrate, and the intermediate metal layers and metal vias are stacked to form a metal shield cavity around the H-shaped slot structure, so as to suppress electromagnetic leakage and reduce loss.
The size parameters of the H-shaped slot structure are finally determined as: 1, = T0ym,l, =220ym,w, =9.5ym,w, =15um, w, = 10m, w, =10ym Step 3: select thin insulating glue, wherein thermal stability insulating glue with a relative dielectric constant of 2.4 and a thickness of 104 is selected and used as insulating glue for combining the rectangular dielectric resonator block and the on-chip H-shaped slot structure.
| 13 BL-5103 LU101366 Step 4: simulate the on-chip terahertz DRA using high-frequency structure simulation analysis software (HFSS). A relationship of a return loss S11 of the on-chip terahertz DRA as a function of frequency is as shown in Fig. 6, wherein the on-chip terahertz DRA has a matching bandwidth of 15.2% (273 - 318 GHz) at an impedance of -10dB. Fig. 7 shows a relationship of a gain of the on-chip terahertz DRA as a function of frequency, wherein the on-chip terahertz DRA has a peak gain of 5.77dBi and a bandwidth of 13.7% (270 - 310 GHz) at a gain of 3 dB. The radiation pattern of the on-chip terahertz DRA is shown in Fig. 8, wherein the on-chip terahertz DRA has a radiation efficiency of 71%. The first DC blocking capacitor C1, the second bias voltage Vb2, and the second bias resistor Rb2 are connected between the output terminal Vout (array) of the NxM terahertz detector array and the positive input terminal of the low noise preamplifier according to the technical solution of the present invention, wherein the second bias resistor Rb2 and the second bias voltage Vb2 are used to supply power to the low noise preamplifier, and the voltage feedback loop of the low noise preamplifier is mainly composed of the first resistor Rf, the resistor Rg, the second DC blocking capacitor C2 and the third DC blocking capacitor C3; and wherein the adjustment of the gain of the low noise preamplifier can be realized by changing the resistance values of the first resistor Rf and the second resistor Rg. The output voltage signal of the NxM DDA-based NMOSFET terahertz detector array of the technical solution of the present invention is a DC voltage signal, and the magnitude of the DC voltage signal is proportional to the radiation intensity of the terahertz signal. The intensity information of the incident terahertz signal can be obtained according to the magnitude of the output voltage signal of the terahertz detector, thereby realizing terahertz detection. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the invention. All equivalent structural alterations made by the present specification and the drawings, or directly or indirectly utilized in other related technical fields, in the concept of the present invention, are encompassed within the scope of patent protection of the present invention.
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Claims (9)

BL-5103 LU101366 Claims
1. An NxM DRA-based NMOSFET terahertz array detector, characterized in that it comprises an NxM terahertz detector array, wherein the NxM terahertz detector array is connected to one end of a first DC blocking capacitor, the other end of the first DC blocking capacitor is connected to one end of a second bias resistor, and the other end of the second bias resistor is connected to a second bias voltage; the second bias resistor is further connected to a positive electrode of a low noise preamplifier; two ends of a first resistor is connected to a negative electrode and an output electrode of the low noise preamplifier, respectively; one end of the first resistor is further connected to one end of a second resistor, the other end of the second resistor is connected to one end of a second DC blocking capacitor, and the other end of the second DC blocking capacitor is grounded; and the other end of the first resistor is connected to one end of a third DC blocking capacitor, and the other end of the third DC blocking capacitor is grounded.
2. The terahertz array detector of claim 1, characterized in that the NxM terahertz detector array comprises N x M detector units, a third bias resistor being simultaneously connected to each detector unit, and the third bias resistor is connected to a third bias voltage.
3. The terahertz array detector of claim 2, characterized in that the detector unit comprises a DRA-based NMOSFET terahertz detector and an NMOSFET connected thereto; the DRA-based NMOSFET terahertz detector specifically includes an on-chip terahertz DRA dielectric resonant antenna, a matching network MN and a first NMOSFET that are connected in order; the first NMOSFET is further | simultaneously connected to the first bias resistor and an open-circuit quarter-wavelength third microstrip transmission line; and the first bias resistor is further connected to a first bias voltage, and the NMOSFET is connected to an SEL terminal and a Vout terminal. |
BL-5103 LU101366
4. The terahertz array detector of claim 3, characterized in that the matching network MN is composed of a first microstrip transmission line and a second microstrip transmission line; a left end of the first microstrip transmission line is connected to the dielectric resonant antenna, and the other end of the first microstrip transmission line is connected to a transistor source M1 of the first NMOSFET: and the first microstrip transmission line is further connected to one end of the second microstrip transmission line, and the other end of the second microstrip transmission line is grounded.
5. The terahertz array detector of claim 4, characterized in that the dielectric resonant antenna comprises an on-chip H-shaped slot structure and a rectangular dielectric resonator block disposed on the on-chip H-shaped slot structure by an insulating glue layer, and the on-chip H-shaped slot structure is formed on an integrated process top-layer metal.
6. The terahertz array detector of claim 5, characterized in that the on-chip H-shaped slot structure is located in a metal cavity formed by stacking intermediate layers of metal other than an integrated process top-layer metal and an integrated process bottom-layer metal in an integrated process and metal vias; the on-chip H-shaped slot structure comprises two vertical slots, a left vertical slot and a right vertical slot, formed in parallel; an inverted L-shaped left slot and an inverted L-shaped right slot are formed on corresponding sides of the left vertical slot and the right vertical slot, respectively; horizontal portions of the inverted L-shaped left slot and the inverted L-shaped right slot are connected in corresponding middle portions of the left vertical slot and the right vertical slot; and vertical portions of the inverted L-shaped left slot and the inverted L-shaped right slot are parallel to each other to form two extraction slots connecting the antenna to an external structure.
7. The terahertz array detector of claim 6, characterized in that the on-chip H-shaped slot structure is designed and processed by selecting and using a silicon-based process; the insulating glue layer fixes the rectangular dielectric resonator block to an on-chip excitation structure; and the rectangular dielectric resonator block is processed to a specific size by selecting and using an insulating material with a relative dielectric constant and coupled to radiate an i
| | 16 BL-5103 LU101366 electromagnetic field to a space.
8. The terahertz array detector of claim 7, characterized in that the rectangular dielectric resonator block is selected as a mode of Epis. the dielectric resonant antenna is designed to have a center frequency of 300 GHz; magnesium oxide having a relative dielectric constant of 9.65 is selected and used as a material of the rectangular dielectric resonator block; and the on-chip structure is designed by selecting and using 0.18mGeSi BiCMOS process (Towerjazz SBC18H3) parameters.
9. A method of designing an on-chip terahertz dielectric resonant antenna with respect to the NxM DRA-based NMOSFET terahertz detector of claim 7, characterized by the following steps: step S1: designing a rectangular dielectric resonator block, wherein a resonance mode is in a mode of MBps, and the size of the rectangular dielectric resonator block can be solved by solving a transcendental equation (1): k tan( ory Ce TOK - #2 2 (1) kn lem -m FE k,=n—E—R+R +R = gk, c Lr, 2H pra (2) wherein Equation (2) described above is an explanation of parameters of Equation (1), where © is the speed of light, and Som is an operating frequency of the rectangular dielectric resonator block in this mode, a high-order resonance mode of TE; 5 mode is selected and used as the resonance mode of the rectangular dielectric resonator block, and then the transcendental equation (1) is solved by programming with mathematical software Matlab to obtain the size of the rectangular dielectric resonator block; | |
! | 17
BL-5103 LU101366 step S2: designing an on-chip excitation structure, wherein in the design process, a top-layer metal Metal6 is selected and used to design a slot structure while a bottom-layer metal Metal1 is selected and used as a metal floor to suppress an electromagnetic wave from propagating to a silicon-based substrate with a highloss, and intermediate layers of metal and metal vias are stacked to form a metal shielding cavity surrounding the H-shaped slot structure to suppress electromagnetic leakage and reduce a loss, and various size parameters of the H-shaped slot structure are finally determined;
step S3: selecting thin insulating glue, wherein thermal stability insulating glue with a relative dielectric constant is selected and used as insulating glue for combining a rectangular dielectric resonator block and the on-chip H-shaped slot structure; and step S4: simulating the on-chip terahertz DRA using high-frequency structuresimulation analysis software.
LU101366A 2019-06-05 2019-08-28 NxM DRA-based NMOSFET terahertz array detector and method of designing antenna LU101366B1 (en)

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