LU101370B1 - Terahertz detector based on DRA and NxM NMOSFET array and method of designing antenna - Google Patents
Terahertz detector based on DRA and NxM NMOSFET array and method of designing antenna Download PDFInfo
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- LU101370B1 LU101370B1 LU101370A LU101370A LU101370B1 LU 101370 B1 LU101370 B1 LU 101370B1 LU 101370 A LU101370 A LU 101370A LU 101370 A LU101370 A LU 101370A LU 101370 B1 LU101370 B1 LU 101370B1
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- 230000005540 biological transmission Effects 0.000 claims abstract description 35
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- 239000003990 capacitor Substances 0.000 claims abstract description 28
- 229910052751 metal Inorganic materials 0.000 claims description 39
- 239000002184 metal Substances 0.000 claims description 39
- 239000003292 glue Substances 0.000 claims description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 230000005284 excitation Effects 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 238000013461 design Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 4
- 238000012938 design process Methods 0.000 claims description 3
- 230000005672 electromagnetic field Effects 0.000 claims description 3
- 238000000605 extraction Methods 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 3
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 3
- 239000000395 magnesium oxide Substances 0.000 claims description 3
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 claims description 3
- 230000001902 propagating effect Effects 0.000 claims description 3
- 238000004088 simulation Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- XAMUDJHXFNRLCY-UHFFFAOYSA-N phenthoate Chemical compound CCOC(=O)C(SP(=S)(OC)OC)C1=CC=CC=C1 XAMUDJHXFNRLCY-UHFFFAOYSA-N 0.000 claims 1
- 102220047090 rs6152 Human genes 0.000 claims 1
- 238000011896 sensitive detection Methods 0.000 abstract 1
- 238000001514 detection method Methods 0.000 description 15
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- 238000004519 manufacturing process Methods 0.000 description 5
- 230000035945 sensitivity Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
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- 230000000694 effects Effects 0.000 description 1
- 230000005670 electromagnetic radiation Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229920002521 macromolecule Polymers 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/36—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/48—Earthing means; Earth screens; Counterpoises
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/50—Structural association of antennas with earthing switches, lead-in devices or lightning protectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q13/00—Waveguide horns or mouths; Slot antennas; Leaky-waveguide antennas; Equivalent structures causing radiation along the transmission path of a guided wave
- H01Q13/10—Resonant slot antennas
- H01Q13/18—Resonant slot antennas the slot being backed by, or formed in boundary wall of, a resonant cavity ; Open cavity antennas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/0006—Particular feeding systems
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/0006—Particular feeding systems
- H01Q21/0075—Stripline fed arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/0087—Apparatus or processes specially adapted for manufacturing antenna arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
- H01Q21/061—Two dimensional planar arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
- H01Q21/061—Two dimensional planar arrays
- H01Q21/064—Two dimensional planar arrays using horn or slot aerials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q23/00—Antennas with active circuits or circuit elements integrated within them or attached to them
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q9/00—Electrically-short antennas having dimensions not more than twice the operating wavelength and consisting of conductive active radiating elements
- H01Q9/04—Resonant antennas
- H01Q9/0485—Dielectric resonator antennas
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/90—Non-optical transmission systems, e.g. transmission systems employing non-photonic corpuscular radiation
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
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- G01J2001/448—Array [CCD]
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Abstract
The present invention discloses a terahertz detector based on a DRA and an NxM NMOSFET array, and a method of designing an antenna. An on-chip DRA is connected to a first transmission line, and the first transmission line is connected to an NxM NMOSFET array. The first transmission line is further connected to a second transmission line, and the second transmission line is grounded. The NxM NMOSFET array is further connected to a first DC blocking capacitor, and the first DC blocking capacitor is connected to a second bias resistor and a positive electrode of a low noise preamplifier. The second bias resistor is connected to a second bias voltage, and the second bias resistor is also connected to the positive electrode of the low noise preamplifier. Two ends of a first resistor are connected to a negative electrode and an output end of the low noise preamplifier, respectively. The first resistor is further connected to a second resistor, the second resistor is connected to a second DC blocking capacitor, the second DC blocking capacitor is grounded, the first resistor is connected to a third DC blocking capacitor, and the third DC blocking capacitor is grounded. Compared with the prior art, the technical solution of the present invention has the advantages of reliable operation, accurate and sensitive detection, etc., and can effectively solve the problems of the prior art.
Description
| 1 BL-5107 LU101370 TERAHERTZ DETECTOR BASED ON DRA AND NxM NMOSFET ARRAY AND
METHOD OF DESIGNING ANTENNA Technical field The present invention relates to the technical field of terahertz detectors, in particular to a terahertz detector based on a DRA and an NxM NMOSFET array and a method of designing an antenna. Technical background Terahertz waves are electromagnetic radiation waves with the frequency in the range of 0.1 - 10 THz, and the wavelength between 3 mm - 30 um. Therefore, they are between microwaves and infrared light waves and belong to far infrared waves. Electromagnetic waves in the terahertz frequency band have many excellent characteristics. For example, both terahertz waves and X-rays have strong penetrability, but compared with X-rays, the terahertz waves have lower photon energy and are capable of detecting macromolecules of a human body without causing any harm to the human body. In addition, the terahertz waves have the characteristics of high resolution, strong directionality, rich spectrum resources, and less scattering in non-uniform materials, etc. Therefore, the terahertz technology can have great research value and broad application prospects in the fields of environmental monitoring, public safety, mobile communication, inter-satellite communication, precision guidance, radio astronomy, etc. However, compared with the electromagnetic waves in other frequency bands, the development and application of the terahertz technology is still not mature, mainly because the terahertz radiation sources and related detection equipment are relatively scarce, and the development of the terahertz technology and its application have mainly relied on the advance of applications such as astronomy and atmospheric remote sensing so far. Therefore, there is a “terahertz gap” that is urgently needed to be studied and filled. Low-cost, high-sensitivity, high-reliability terahertz detectors are necessary for the rapid development of the terahertz technology. Currently, the mainstream terahertz | |
BL-5107 LU101370 frequency band detectors mainly include mixing receivers, bolometers, superconducting receivers, etc.
However, the bolometer and superconducting receiver need to operate in a low temperature environment, and thus cannot meet the needs of operating at room temperature.
The mixing receiver has high sensitivity and good noise figure, and is often used in space remote sensing and other fields with high sensitivity requirements, but has larger limitations due to a complex circuit structure and a relatively high cost.
At present, terahertz detection based on NMOSFET has proven to be very feasible.
Compared with the bolometer and superconducting receiver, a terahertz detector based on NMOSFET for terahertz detection can operate at room temperature.
Moreover, compared with the mixing receiver, the terahertz detector based on NMOSFET for terahertz detection has a simple circuit structure and adopts a standard CMOS process, so that there are advantages of high integration, mass production, and a low cost.
However, due to the problems such as the lower gain and radiation efficiency of conventional terahertz antennas such as on-chip patches, and the failure of a single NMOSFET circuit that may occur in a chip manufacturing process, the NMOSFET-based terahertz detection is difficult to meet the actual use requirements in terms of sensitivity and reliability.
Therefore, how to solve the problems of “the lower gain and radiation efficiency of the conventional terahertz antennas such as on-chip patches, and the failure of the single NMOSFET circuit that may occur in the chip manufacturing process” actually existing in the process of NMOSFET-based detection and thus improve the detection sensitivity and reliability of NMOSFET-based detection is a technical problem that is currently urgently needed to be solved.
Summary of the invention A main object of the present invention is to provide a terahertz detector based on a DRA and an NxM NMOSFET array.
The present invention also proposes a method of designing an antenna, which aims to solve the technical problems of “the lower gain and radiation efficiency of the conventional terahertz antennas such as on-chip patches, and the failure of the single NMOSFET circuit that may occur in the chip manufacturing process” actually existing in the process of | |
I 3 BL-5107 LU101370 NMOSFET-based detection. To achieve the above object, the present invention proposes a terahertz detector based on a DRA and an NxM NMOSFET array, comprising an on-chip DRA, wherein the on-chip DRA is connected to one end of a first transmission line of a matching network MN, and the other end of the first transmission line is connected to one end of the NxM NMOSFET array; the first transmission line is further connected to one end of a second transmission line, and the other end of the second transmission line is grounded; the other end of the NxM NMOSFET array is further connected to one end of a first DC blocking capacitor, and the other end of the first DC blocking capacitor is connected to one end of a second bias resistor and a positive electrode of a low noise preamplifier; the other end of the second bias resistor is connected to a second bias voltage, and the one end of the second bias resistor is also connected to the positive electrode of the low noise preamplifier; two ends of a first resistor are connected to a negative electrode and an output end of the low noise preamplifier, respectively; one end of the first resistor is further connected to one end of a second resistor, and the other end of the second resistor is connected to one end of a second DC blocking capacitor; and the other end of the second DC blocking capacitor is grounded, the other end of the first resistor is connected to one end of a third DC blocking capacitor, and the other end of the third DC blocking capacitor is grounded.
Preferably, the NxM NMOSFET array comprises NxM NMOSFET units, a source of each NMOSFET unit is simultaneously connected to the first transmission line of the matching network MN, and a gate of each NMOSFET unit is connected to a third bias resistor Rb3 through a switch; and the third bias resistor Rb3 is connected to a third bias voltage Vb3, and a drain of each NMOSFET unit is connected to a Vout terminal through a switch.
Preferably, each of the NMOSFET units comprises a first NMOSFET and a second NMOSFET, a first bias resistor, a first bias voltage, and an open-circuit quarter-wavelength third transmission line; and a source of the first NMOSFET is connected to the matching network MN, a gate of the first NMOSFET is connected to the first bias resistor and the third transmission line, the other end of the first bias | |
3 | 4 BL-5107 LU101370 resistor is connected to a first DC bias voltage, a drain of the first NMOSFET is connected to a source of the second NMOSFET, a gate of the second NMOSFET is connected to an SEL terminal, and a drain of the second NMOSFET is connected to the Vout terminal.
Preferably, a dielectric resonant antenna of the on-chip DRA comprises an on-chip H-shaped slot structure and a rectangular dielectric resonator block disposed on the on-chip H-shaped slot structure by an insulating glue layer, and the on-chip H-shaped slot structure is formed on an integrated process top-layer metal.
Preferably, the on-chip H-shaped slot structure is located in a metal cavity formed by stacking intermediate layers of metal other than an integrated process top-layer metal and an integrated process bottom-layer metal in an integrated process and metal vias; the on-chip H-shaped slot structure comprises two vertical slots, a left Vertical slot and a right vertical slot, formed in parallel; an inverted L-shaped left slot and an inverted L-shaped right slot are formed on corresponding sides of the left vertical slot and the right vertical slot, respectively; horizontal portions of the inverted L-shaped left slot and the inverted L-shaped right slot are connected in corresponding middle portions of the left vertical slot and the right vertical slot; and vertical portions of the inverted L-shaped left slot and the inverted L-shaped right slot are parallel to each other to form two extraction slots connecting the antenna to an external structure. Preferably, the on-chip H-shaped slot structure is designed and processed by selecting and using a silicon-based process; the insulating glue layer fixes the rectangular dielectric resonator block to an on-chip excitation structure; and the rectangular dielectric resonator block is processed to a specific size by selecting and using an insulating material with a relative dielectric constant and coupled to radiate an electromagnetic field to a space.
Preferably, the rectangular dielectric resonator block is selected as a mode of TEs, the dielectric resonant antenna is designed to have a center frequency of 300 GHz; magnesium oxide having a relative dielectric constant of 9.65 is selected ; |
| BL-5107 LU101370 and used as a material of the rectangular dielectric resonator block; and the on-chip structure is designed by selecting and using 0.18mGeSi BiCMOS process parameters.
5 The present invention also proposes a method of designing a dielectric resonant antenna for the terahertz detector based on the DRA and the NxM NMOSFET array, comprising the following steps: step S1: designing a rectangular dielectric resonator block, wherein a resonance mode is in a mode of Esa, and the size of the rectangular dielectric resonator block can be solved by solving a transcendental equation (1): k, tan ony Ce Di = RE 2 (1) k= am Ek on RA RAR =a, c Lr 2H, 2) wherein Equation (2) described above is an explanation of parameters of Equation (1), where © is the speed of light, and om is an operating frequency of the rectangular dielectric resonator block in this mode, a high-order resonance mode of Ess mode is selected and used as the resonance mode of the rectangular dielectric resonator block, and then the transcendental equation (1) is solved by programming with mathematical software Matlab so as to obtain the size of the rectangular dielectric resonator block; step S2: designing an on-chip excitation structure, wherein in the design process, a top-layer metal Metal6 is selected and used to design a slot structure while a bottom-layer metal Metal1 is selected and used as a metal floor to suppress an electromagnetic wave from propagating to a silicon-based substrate with a high loss, and intermediate layers of metal and metal vias are stacked to form a metal shielding cavity surrounding the H-shaped slot structure to suppress electromagnetic leakage and reduce a loss, and various size parameters of the | |
BL-5107 LU101370 H-shaped slot structure are finally determined: step S3: selecting thin insulating glue, wherein thermal stability insulating glue with a relative dielectric constant is selected and used as insulating glue for combining a rectangular dielectric resonator block and the on-chip H-shaped slot structure: and step S4: simulating the on-chip DRA using high-frequency structure simulation analysis software.
The technical solution of the present invention has the following advantages over the prior art: The technical solution of the present invention combines a rectangular dielectric resonator block with a high-order mode of TEs mode having low loss characteristics and an on-chip slot feed structure, which can effectively solve the technical problem of “the low gain and radiation efficiency existing in designing the on-chip terahertz antenna’. Compared with conventional NMOSFET terahertz detectors based on terahertz antennas such as on-chip patches, higher gain and radiation efficiency of on-chip terahertz antennas can be achieved and detection sensitivity of terahertz detectors can be improved.
The technical solution of the present invention introduces an NxM NMOSFET array into a terahertz detector based on NMOSFET detection. Compared with terahertz detectors based single-NMOSFET detection, precise control of the actual number of operating pixel units can be achieved, and each pixel unit remains independent to operate and does not interfere with each other. Moreover, the risk of failure of the entire terahertz detector due to failure of a single NMOSFET circuit during manufacturing is effectively reduced, resulting in higher reliability.
Therefore, the output voltage signal of the terahertz detector based on the on-chip terahertz DRA and the NxM NMOSFET array of the embodiment according to the present invention is a DC voltage signal, and the magnitude of the DC voltage signal is proportional to the radiation intensity of the terahertz signal. The intensity | |
| i 7 BL-5107 LU101370 information of the incident terahertz signal can be obtained according to the magnitude of the output voltage signal of the terahertz detector, thereby achieving sensitive and accurate terahertz detection. In addition, in each NMOSFET unit, the width-to-length ratio W/L of the first NMOSFET (the gate is biased with a resistor and a voltage) may be the same, or may be different, and can be adaptively adjusted according to actual detection requirements, whereas the width-to-length ratio W/L of the second NMOSFET (the gate is not biased with a resistor and a voltage) is generally the same, similar to a function of a switch.
Brief description of the drawings In order to more clearly illustrate the technical solutions in embodiments of the present invention or the prior art, the accompanying drawings needed to be used in the description of the embodiments or the prior art will be briefly described below.
Obviously, the accompanying drawings in the following description are only some embodiments of the present invention, and other accompanying drawings can be obtained by ordinary persons skilled in the art from the structures illustrated in these accompanying drawings without any inventive efforts.
Fig. 1 is a schematic structural view of a terahertz detector based on a DRA and an NxM NMOSFET array of the present invention; Fig. 2 is a schematic structural view of an NxM NMOSFET array of the present invention; Fig. 3 is a schematic structural view of an on-chip DRA of the present invention; Fig. 4 is a schematic perspective view of a rectangular dielectric resonator block of the present invention; Fig. 5 is a schematic structural view of an on-chip H-shaped slot structure of the present invention; Fig. 6 is a diagram showing a relationship of a return loss S11 of the on-chip DRA of | |
! | 8 BL-5107 LU101370 the present invention as a function of frequency; Fig. 7 a relationship of a gain of the on-chip DRA of the present invention as a function of frequency; and
Fig. 8 is a radiation pattern of the on-chip DRA of the present invention.
Description of the reference numerals: Reference Name Reference Name |e | 1 On-chip H-shaped slot 12 Right vertical slot 1 | ame 4 a 3 Rectangular dielectric 14 Right slot | Cee | 4 Integrated process top-layer 15 Metal cavity Te 11 Left vertical slot 101 Integrated process TTT memes
The implementation, functional features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed description of the embodiments
The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention.
Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all the embodiments.
All other embodiments obtained by ordinary persons skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention. | |
BL-5107 LU101370 It should be noted that if there is a directional indication (such as up, down, left, right, front, back, ...) mentioned in the embodiments of the present invention, the directional indication is only used to explain the relative positional relationship between components, motion status, and the like in a specific posture (as shown in the drawing), and if the specific posture changes, the directional indication also changes accordingly. In addition, if there is a description of "first", "second", etc. in the embodiments of the present invention, the description of the "first", "second", etc. is used for the purpose of description only, and is not to be construed as an its relative importance or implicit indication of the number of technical features indicated. Thus, the features defined by "first" or "second" may include at least one of the features, either explicitly or implicitly. In addition, the technical solutions among the various embodiments may be combined with each other, but must be based on the enablement of those skilled in the art, and when the combination of the technical solutions is contradictory or impossible to implement, it should be considered that the combination of the technical solutions does not exist, and is not within the scope of protection claimed by the present invention.
The present invention proposes a terahertz detector based on a DRA and an NxM NMOSFET array. Referring to Fig. 1, a terahertz detector based on a DRA and an NxM NMOSFET array according to an embodiment of the present invention includes an on-chip DRA, a matching network MN, an NxM NMOSFET array, a second bias voltage Vb2, a second bias resistor Rb2, a first DC blocking capacitor C1 and a voltage feedback loop mainly composed of a low noise preamplifier. Specifically, a dielectric resonant antenna of the on-chip DRA of the present embodiment is connected to one end of an open-circuit quarter-wavelength first transmission line TL1, the other end of the first transmission line TL1 is connected to the NxM NMOSFET array. The first transmission line TL1 is further connected to one end of a second transmission line TL2, and the other end of the second transmission line TL2 is grounded. The NxM NMOSFET array is further connected to one end of the first | |
BL-5107 LU101370 DC blocking capacitor C1, and the other end of the first DC blocking capacitor C1 is connected to one end of the second bias resistor Rb2 and a positive electrode of the low noise preamplifier.
The other end of the second bias resistor Rb2 is connected to the second bias voltage Vb2, and one end of the second bias resistor Rb2 is also connected to the positive electrode of the low noise preamplifier.
Two ends of a first resistor Rf are connected to a negative electrode and an output end of the low noise preamplifier, respectively.
One end of the first resistor Rf is further connected to one end of a second resistor Rg, and the other end of the second resistor Rg is connected to one end of a second DC blocking capacitor.
The other end of the second DC blocking capacitor C2 is grounded, the other end of the first resistor Rf is connected to one end of a third DC blocking capacitor C3, and the other end of the third DC blocking capacitor C3 is grounded.
The matching network MN is composed of two microstrip transmission lines, a first transmission line TL1 and a second transmission line TL2. The matching network MN is mainly used to improve power transmission efficiency between an antenna and a transistor, and supplies DC power to a source M1 of a transistor inside the NxM NMOSFET array.
The left end of the first transmission line TL1 is connected to a dielectric resonant antenna of the on-chip DRA, and the right end of the first transmission line TL1 is connected to an array of input terminals M1 of the NxM NMOSFET array.
As shown in Fig. 2, the NxM NMOSFET array includes NxM NMOSFET units (labelled as D11, D12, D13, ..., DNM), that is, the NxM NMOSFET array includes N row selection control switches (Row1, Row2, Row3, ..., RowN) in a lateral direction and M column selection control switches (Column1, Column2, Column3, ..., ColumnM) in a longitudinal direction.
A source of each NMOSFET unit is simultaneously connected to the matching network MN, and a gate of each NMOSFET unit is connected to a third bias resistor Rb3 through a switch.
The third bias resistor Rb3 is connected to a third bias voltage Vb3, and a drain of each NMOSFET unit is connected to a Vout terminal through a switch.
Specifically, each NMOSFET unit of the present embodiment includes two NMOSFETs (a first NMOSFET and a second NMOSFET), a first bias voltage Vb1, a first bias resistor Rb1, and an open-circuit quarter-wavelength third transmission line TL3. !
! J 11 BL-5107 LU101370 Specifically, a source of the first NMOSFET on the left side is connected to the matching network MN, and a gate of the first NMOSFET is connected to the first bias resistor Rb1 and the third transmission line TL3. The other end of the first bias resistor Rb1 is connected to the first DC bias voltage Vb1. A drain of the first NMOSFET is connected to a source of the second NMOSFET, a gate of the second NMOSFET is connected to a SEL terminal, and a drain of the second NMOSFET is connected to the Vout terminal, wherein the third transmission line TL3 is used to eliminate the influence of the gate DC bias on impedance matching between the antenna and the transistor.
As shown in Figs. 3, 4 and 5, the dielectric resonant antenna of the on-chip DRA proposed in the present invention includes an on-chip H-shaped slot structure 1 and a rectangular dielectric resonator block 3 provided on the on-chip H-shaped slot structure 1 through a insulating glue layer 2, and the on-chip H-shaped slot structure 1 is formed on an integrated process top-layer metal 4. Specifically, the on-chip H-shaped slot structure 1 is located in a metal cavity 15 formed by stacking intermediate layers of metal other than an integrated process top-layer metal 4 and an integrated process bottom-layer metal 101 in an integrated process and metal vias, and the on-chip H-shaped slot structure 1 includes two vertical slots, a left vertical slot 11 and a right vertical slot 12, formed in parallel. An inverted L-shaped left slot 13 and an inverted L-shaped right slot 14 are formed on corresponding sides of the left vertical slot 11 and the right vertical slot 12, respectively. Horizontal portions of the inverted L-shaped left slot 13 and the inverted L-shaped right slot 14 are connected in corresponding middle portions of the left vertical slot 11 and the right vertical slot 12, and vertical portions of the inverted L-shaped left slot 13 and the inverted L-shaped right slot 14 are parallel to each other to form two extraction slots connecting the antenna to an external structure. Preferably, the on-chip H-shaped slot structure 1 of the present embodiment is designed and processed by selecting and using a silicon-based process to excite a rectangular dielectric resonator block covering the upper portion thereof and optimize the impedance matching effect, and the insulating glue layer 2 has good thermal stability and can fix the rectangular dielectric resonator block to the on-chip excitation structure. The rectangular dielectric resonator block 3 is processed to a specific size by selecting and using an insulating material with a larger relative dielectric constant (more |
! { 12 BL-5107 LU101370 preferably, a relative dielectric constant of >5) and coupled to radiate an electromagnetic field to a space. In the present invention, the rectangular dielectric resonance mode is selected as TEs mode.
A center frequency of a dielectric resonant antenna design according to an embodiment of the present invention is 300 GHz, and magnesium oxide having a relative dielectric constant of 9.65 is selected and used as the material of the rectangular dielectric resonator block. The on-chip structure is designed by selecting and using 0.18mGeSi BiCMOS process (Towerjazz SBC18H3) parameters, and there are six layers of metal Metal1-Metal6 and five layers of metal vias Via1-Via5 in this process.
The present invention also proposes a method of designing a dielectric resonant antenna for the terahertz detector based on the DRA and the NxM NMOSFET array, specifically comprising the following design steps: Step 1: designing a rectangular dielectric resonator block, wherein a resonance mode is in a mode of Esa, and the size of the rectangular dielectric resonator block as shown in Fig. 3 can be solved by solving a transcendental equation (1): k tan ent = fe, Da 2 (1) 6, = lan m Zk =n RAR AK =k, c Lory 2H, 2) where Equation (2) as described above is the explanation for parameters of Equation (1), wherein © is the speed of light, and on is the operating frequency of the rectangular dielectric resonator block in this mode. A high-order resonance mode of TEsns mode is selected and used as the resonance mode of the rectangular dielectric resonator block, and can have a higher gain than the base mode. Then, the transcendental equation (1) is solved by programming with the | |
| | 13 BL-5107 LU101370 mathematical software Matlab, obtaining the sizes of the rectangular dielectric resonator block at 300 GHz as: or = 2504m, Lpp = 250m, Hop = 400m Step 2: designing an on-chip excitation structure, wherein the on-chip H-shaped slot structure is as shown in Fig. 5. In the design process, the top-layer metal Metal6 is selected and used to design the slot structure, while the bottom-layer metal Metall is selected and used as the metal floor to suppress the electromagnetic wave from propagating toward a high-loss silicon-based substrate, and the intermediate metal layers and metal vias are stacked to form a metal shield cavity around the H-shaped slot structure, to suppress electromagnetic leakage and reduce loss. The size parameters of the H-shaped slot structure are finally determined as: I =70ym,l, =220ym,w, =9.5ym,w, =15ym,w, = Oym, w, =10ym Step 3: select thin insulating glue, wherein thermal stability insulating glue with a relative dielectric constant of 2.4 and a thickness of 104” is selected and used as insulating glue for combining the rectangular dielectric resonator block and the on-chip H-shaped slot structure.
Step 4: simulate the on-chip DRA using high-frequency structure simulation analysis software (HFSS). À relationship of a return loss S11 of the on-chip DRA as a function of frequency is as shown in Fig. 6, wherein the on-chip DRA has a matching bandwidth of 15.2% (273 - 318 GHz) at an impedance of -10dB. Fig. 7 shows a relationship of a gain of the on-chip DRA as a function of frequency, wherein the on-chip DRA has a peak gain of 5.77dBi and a bandwidth of 13.7% (270 - 310 GHz) at a gain of 3 dB. The radiation pattern of the on-chip DRA is shown in Fig. 8, wherein the on-chip DRA has a radiation efficiency of 71%.
The first DC blocking capacitor C1, the second bias voltage Vb2, and the second bias resistor Rb2 are connected between the output terminal Vout (array) of the NxM NMOSFET array and the positive input terminal of the low noise preamplifier according to the technical solution of the present invention, wherein the second
BL-5107 LU101370 bias resistor Rb2 and the second bias voltage Vb2 are used to supply power to the low noise preamplifier, and the voltage feedback loop of the low noise preamplifier is mainly composed of the first resistor Rf, the resistor Rg, the second DC blocking capacitor C2 and the third DC blocking capacitor C3; and wherein the adjustment of the gain of the low noise preamplifier can be realized by changing the resistance values of the first resistor Rf and the second resistor Rg. The output voltage signal of the terahertz detector based on the DRA and the NxM NMOSFET array of the technical solution of the present invention is a DC voltage signal, and the magnitude of the DC voltage signal is proportional to the radiation intensity of the terahertz signal, so that the intensity information of the incident terahertz signal can be obtained according to the magnitude of the output voltage signal of the terahertz detector, thereby realizing terahertz detection. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the invention. All equivalent structural alterations made by the present specification and the drawings, or directly or indirectly utilized in other related technical fields, in the concept of the present invention, are encompassed within the scope of patent protection of the present invention.
| |
Claims (8)
1. A terahertz detector based on a DRA and an NxM NMOSFET array, characterized in that it comprises an on-chip DRA, wherein the on-chip DRA is connected to one end of a first transmission line of a matching network MN, and the other end of the first transmission line is connected to one end of the NxM NMOSFET array; the first transmission line is further connected to one end of a second transmission line, and the other end of the second transmission line is grounded; the other end of the NxM NMOSFET array is further connected to one end of a first DC blocking capacitor, and the other end of the first DC blocking capacitor is connected to one end of a second bias resistor and a positive electrode of a low noise preamplifier; the other end of the second bias resistor is connected to a second bias voltage, and the one end of the second bias resistor is also connected to the positive electrode of the low noise preamplifier; two ends of a first resistor are connected to a negative electrode and an output end of the low noise preamplifier, respectively; one end of the first resistor is further connected to one end of a second resistor, and the other end of the second resistor is connected to one end of a second DC blocking capacitor; and the other end of the second DC blocking capacitor is grounded, the other end of the first resistor is connected to one end of a third DC blocking capacitor, and the other end of the third DC blocking capacitor is grounded.
2. The terahertz detector based on the DRA and the NxM NMOSFET array of claim 1, characterized in that the NxM NMOSFET array comprises NxM NMOSFET units, a source of each NMOSFET unit is simultaneously connected to the first transmission line of the matching network MN, and a gate of each NMOSFET unit is connected to a third bias resistor Rb3 through a switch; and the third bias resistor Rb3 is connected to a third bias voltage Vb3, and a drain of each NMOSFET unit is connected to a Vout terminal through a switch.
3. The terahertz detector based on the DRA and the NxM NMOSFET array of claim 2, characterized in that each of the NMOSFET units comprises a first NMOSFET | |
| ! 16 BL-5107 LU101370 and a second NMOSFET, a first bias resistor, a first bias voltage, and an open-circuit quarter-wavelength third transmission line; and a source of the first NMOSFET is connected to the matching network MN, a gate of the first NMOSFET is connected to the first bias resistor and the third transmission line, the other end of the first bias resistor is connected to a first DC bias voltage, a drain of the first NMOSFET is connected to a source of the second NMOSFET, a gate of the second NMOSFET is connected to an SEL terminal, and a drain of the second NMOSFET is connected to the Vout terminal.
4. The terahertz detector based on the DRA and the NxM NMOSFET array of claim 3, characterized in that a dielectric resonant antenna of the on-chip DRA comprises an on-chip H-shaped slot structure and a rectangular dielectric resonator block disposed on the on-chip H-shaped slot structure by an insulating glue layer, and the on-chip H-shaped slot structure is formed on an integrated process top-layer metal.
5. The terahertz detector based on the DRA and the NxM NMOSFET array of claim 4, characterized in that the on-chip H-shaped slot structure is located in a metal cavity formed by stacking intermediate layers of metal other than an integrated process top-layer metal and an integrated process bottom-layer metal in an integrated process and metal vias; the on-chip H-shaped slot structure comprises two vertical slots, a left vertical slot and a right vertical slot, formed in parallel; an inverted L-shaped left slot and an inverted L-shaped right slot are formed on corresponding sides of the left vertical slot and the right vertical slot, respectively; horizontal portions of the inverted L-shaped left slot and the inverted L-shaped right slot are connected in corresponding middle portions of the left vertical slot and the right vertical slot; and vertical portions of the inverted L-shaped left slot and the inverted L-shaped right slot are parallel to each other to form two extraction slots connecting the antenna to an external structure.
6. The terahertz detector based on the DRA and the NxM NMOSFET array of claim 5, characterized in that the on-chip H-shaped slot structure is designed and processed by selecting and using a silicon-based process; the insulating glue layer fixes the rectangular dielectric resonator block to an on-chip excitation structure; and the rectangular dielectric resonator block is processed to a specific size by } |
| | | 17 BL-5107 LU101370 selecting and using an insulating material with a relative dielectric constant and coupled to radiate an electromagnetic field to a space. |
7. The terahertz detector based on the DRA and the NxM NMOSFET array of claim 6, characterized in that the rectangular dielectric resonator block is selected as a mode of Eas. the dielectric resonant antenna is designed to have a center frequency of 300 GHz; magnesium oxide having a relative dielectric constant of
9.65 is selected and used as a material of the rectangular dielectric resonator block; and the on-chip structure is designed by selecting and using 0.18mGeSi BiCMOS process parameters.
8. A method of designing a dielectric resonant antenna for the terahertz detector based on the DRA and the NxM NMOSFET array of claim 6, characterized by the following steps: step S1: designing a rectangular dielectric resonator block, wherein a resonance mode is in a mode of Esa, and the size of the rectangular dielectric resonator block can be solved by solving a transcendental equation (1): k, tan one) ee Ti Te? 2 (1) bpp =n m kn AR = wherein Equation (2) described above is an explanation of parameters of Equation (1), where © is the speed of light, and om is an operating frequency of the rectangular dielectric resonator block in this mode, a high-order resonance mode of TE; 5 mode is selected and used as the resonance mode of the rectangular dielectric resonator block, and then the transcendental equation (1) is solved by programming with mathematical software Matlab so as to obtain the size of the rectangular dielectric resonator block; | |
| | 18 BL-5107 LU101370 step S2: designing an on-chip excitation structure, wherein in the design process, a top-layer metal Metal6 is selected and used to design a slot structure while a bottom-layer metal Metal1 is selected and used as a metal floor to suppress an electromagnetic wave from propagating to a silicon-based substrate with a high loss, and intermediate layers of metal and metal vias are stacked to form a metal shielding cavity surrounding the H-shaped slot structure to suppress electromagnetic leakage and reduce a loss, and various size parameters of the H-shaped slot structure are finally determined;
step S3: selecting thin insulating glue, wherein thermal stability insulating glue with a relative dielectric constant is selected and used as insulating glue for combining a rectangular dielectric resonator block and the on-chip H-shaped slot structure: and step S4: simulating the on-chip DRA using high-frequency structure simulation analysis software. i |
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