KR980013300A - Etching method of insulating film of liquid crystal display - Google Patents
Etching method of insulating film of liquid crystal display Download PDFInfo
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- KR980013300A KR980013300A KR1019960028525A KR19960028525A KR980013300A KR 980013300 A KR980013300 A KR 980013300A KR 1019960028525 A KR1019960028525 A KR 1019960028525A KR 19960028525 A KR19960028525 A KR 19960028525A KR 980013300 A KR980013300 A KR 980013300A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
- H01B1/02—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
- H01B1/026—Alloys based on copper
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
Abstract
본 발명은 Cr금속만과 Si본딩을 갖는 유기절연막의 적층구조에서 이 유기절연막을 에칭하는 방법으로써 유기절연막 위에 포토레지스트를 도포한 후 소정의 패턴이 되도록 현상하는 공정과, O2/SF6가스를 이용하여 Cr금속막이 노출되기 직전 까지 빠른 속도로 유기절연막을 에칭하는 공정과, 이 노출되기 직전의 유기절연막을 O2/CF4,가스에 노출시는 공정을 갖도록하여 에칭의 택트타임(tact time)을 감소시켜 액정표시장치의 수율을 향상하고 에칭으로 노출된 Cr금속막의 접촉저항 불량을 줄일 수 있다.The invention Cr metal only and Si in the stack structure of the organic insulating film having a bond as a method for etching the organic insulating layer after applying a photoresist on the organic insulating layer a predetermined pattern so that the developing process and, O 2 / SF 6 gas to the A step of etching the organic insulating film at a high speed until immediately before the Cr metal film is exposed, and a step of exposing the organic insulating film immediately before the exposure to the O 2 / CF 4 gas to the etching tact time tact time can be reduced to improve the yield of the liquid crystal display device and reduce the contact resistance defect of the Cr metal film exposed by etching.
Description
제 1도는 일반적인 액정표시장치의 단면도,FIG. 1 is a cross-sectional view of a general liquid crystal display device,
제 2도는 일반적인 액정표시장치의 단면도,FIG. 2 is a cross-sectional view of a typical liquid crystal display device,
제 3도는 제2도의 Ⅲ-Ⅲ 단면도,3 is a sectional view taken along line III-III of FIG. 2,
제 4도, 제6도는 금속막과 절연막의 적층된 형태에서 절연막의 일부를 에칭하여 금속막의 일부를 노출시키는 과정을 나타내는 본 발명의 실시예를 설명하기 위한 공정단면도,FIGS. 4 and 6 are cross-sectional views illustrating a process for etching a part of an insulating film to expose a part of a metal film in a laminated form of a metal film and an insulating film,
제 5도는 O2/SF6 또는 O2/SF4 가스를 사용하여 유기절연막을 에칭했을 때 에칭으로 인하여 노출된 Cr금속막 표면의 접촉저항의 변화를 실험한 내용을 나타내는 도면,FIG. 5 is a graph showing a change in contact resistance of the exposed surface of a Cr metal film due to etching when an organic insulating film is etched using O 2 / SF 6 or O 2 / SF 4 gas;
* 도면의 주요부분에 대한 부호의 설명DESCRIPTION OF THE REFERENCE NUMERALS
(11,12)투명기판, (14)액정, (15)화소전국, (16)TFT, (17)공통전극, (18)게이트버스라인, (19)데이타버스라인, (19a)소스전극, (19b),(110)드레인전극, (22)반도체층, (23)게이트절연막, (25)오믹접촉층, (26)보호막, (36)(136)콘택홀, (38)(138)유기절연막, (40)마스크(16) TFT, (17) common electrode, (18) gate bus line, (19) data bus line, (19a) source electrode, A source electrode 19b, a drain electrode 110, a semiconductor layer 22, a gate insulating layer 25, an ohmic contact layer 26, a protective layer 36, a contact hole 36, Insulating film, (40) mask
본 발명은 박막트렌지스터(이하 TFT라 칭한다)를 스위칭소자로 이용하는 액정표시장치에 관한 것으로서 특히 TFT의 제조방법에 있어서 절연막 등의 에칭과 에칭후 노출되는 금속막의 접촉저항에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device using a thin film transistor (hereinafter referred to as TFT) as a switching element, and more particularly to a contact resistance of a metal film exposed after etching and etching in an insulating film in a TFT manufacturing method.
액정표시장치는 예를 들면 일반적인 액정표시장치의 단면도를 나타내는 제1도 및 평면도를 나타내는 제2도에 나타낸 바와 같이 투명기판(11) 및 (12)이 셀(celL)갭을 유지하기 위한 스페이서(도면에 도시되지 않음)에 의하여 액정이 주입될 수 있는 소정의 간격을 두고 서로 대향하여 설치되어 있다.1, the liquid crystal display device includes a transparent substrate 11 and a spacer 12 for holding a cell (celL) gap (see FIG. 1) (Not shown in the drawings) at predetermined intervals so that the liquid crystal can be injected.
미설명 부호(13)은 상기 주입된 액정을 봉합하는 실(seal)재이다.The unexplained reference numeral 13 is a seal member for sealing the injected liquid crystal.
한쪽의 투명기판(11) 내면에 화소전극(15)이 복수개 형성되어 있다.A plurality of pixel electrodes 15 are formed on the inner surface of one transparent substrate 11.
상기 각 화소전극(15)에는 스위칭소자로 기능하는 TFT(16)가 형성되어 있으며 이 TFT의 드레인전극이 화소전극에 접속된다.Each of the pixel electrodes 15 has a TFT 16 functioning as a switching element, and the drain electrode of the TFT is connected to the pixel electrode.
한편, 상기 복수개의 화소전극(15)과 대향해서 다른 한 쪽의 투명기판(12) 내면에는 공통전극(17) 등이 형성되어 있다.On the other hand, a common electrode 17 and the like are formed on the inner surface of one transparent substrate 12 opposite to the plurality of pixel electrodes 15.
상기 화소전극(15)은 예를 들면 제2도에 도시된 바와 같이 투명기판(11) 위에 정방형의 화소전극이 격자상으로 배열되어 있다.In the pixel electrode 15, for example, as shown in FIG. 2, square pixel electrodes are arranged in a lattice form on a transparent substrate 11.
상기 화소전극(15)의 횡 방향과 근접하여 게이트버스라인(18)이 형성되어 있다. 또한 화소전극(15)의 종 방향과 근접하여 데이타버스라인(19)이 형성되어 있다. 상기 게이트버스라인(18) 및 데이타버스라인(19)의 교차점 부분에 TFT(16)가 설치되어 있다. 상기 교차점 부분에 설치된 TFT의 게이트전극은 게이트버스라인(18)에서 분기되며, 소스전극은 데이타버스라인(19)에서 분기된다. 상기 게이트버스라인(18)과 데이터버스라인(19)을 각 1개씩 선택하여 전압을 인가하면 그 교차점에 있는 TFT(16)만이 온(ON)되고, 온된 TFT의 드레인전극에 접속된 화소전극(15)에 전하가 축적되어 공통전극(17) 사이의 액정(14)에 전압이 인가된다. 상기 전압이 인가된 액정은 액정분자 배열 각도가 변하게 되고, 상기 액정분자의 배열 각도에 따라 빛을 투과하거나 차단한다.A gate bus line 18 is formed adjacent to the lateral direction of the pixel electrode 15. Further, a data bus line 19 is formed close to the longitudinal direction of the pixel electrode 15. A TFT 16 is provided at the intersection of the gate bus line 18 and the data bus line 19. The gate electrode of the TFT provided at the intersection portion is branched at the gate bus line 18 and the source electrode is branched at the data bus line 19. [ When one of the gate bus line 18 and the data bus line 19 is selected and a voltage is applied, only the TFT 16 at the intersection is turned on and the pixel electrode 15, and a voltage is applied to the liquid crystal 14 between the common electrodes 17. [ In the liquid crystal to which the voltage is applied, the angle of arrangement of the liquid crystal molecules is changed, and light is transmitted or blocked according to the arrangement angle of the liquid crystal molecules.
상기와 같은 원리를 이용하여 각 화소전극(15)마다 빛을 투과 및 차단을 선택적으로 컨트롤할 수 있다. 상기의 TFT(16)은 예를 들어 제2도의 Ⅲ-Ⅲ 단면을 나타내는 제3도에 도시한 바와 같이 구성되어 있다. 상기와 같은 여러구성 요소 중 한 예로 TFT(16)등을 구성할 때 금속층과 절연막 등의 보호막을 적층하고 상기 보호막을 에칭하여 콘택홀(36)을 형성한 후 상기 금속막과 전기적으로 접촉되는 막을 형성하는 공정 등이 필요하다. 하나의 예를들어 Cr금속등으로 형성된 드레인전극(19b)층 위의 보호막이 Si본딩을 갖는 벤조싸이클로부텐(Benzocyclobutene:BCB) 등의 유기절연막으로 형성되었을 때, 본 발명과 관련되는 Cr금속막 위의 보호막을 에칭하는 공정을 이하에 기술한다. 보호막 위에 포토레지스트를 도포한 후 소정의 패턴이 되도록 포토레지스트를 현상한다. 이어서 상기 소정의 패턴으로 포토레지스트가 현상된 구조물을 진공로에 넣은 후 일정 비율로 혼합된 O2/SF6가스나 혹은 O2/CF4, 가스에 상기 구조물을 노출시킨다. 상기와 같은 공정을 거쳐 포토레지스트가 현상된 부분의 보호막을 SF6가스나 혹은 CF4에 에칭되어 콘택홀이 형성되고 동시에 보호막 위에 남아있는 포토레지스트는 O2가스에 의해 에슁(ashing)되어 제거된다. 상기 Si 본딩을 갖는 유기절연막으로 된 보호막이 SF6, CF4가스에 에칭되는 메카니즘을 더 상세히 기술하면 유기절연막의 Si본딩이 SF6, CF4가스의 F기와 반응하여 Si4,의 휘발성 물질로 변하기 때문에 SF6, CF4가스에 노출된 유기절연막이 에칭되는 것이다 에칭속도는 자유상태의 F기가 많은 SF6가스를 사용할 때 더 빠르고, 자유상태의 F기가 상대적으로 적은 CF4가스를 사용할 때 느리다. 그런데 종래의 SF6혹은 CF4가스를 사용하여 Cr금속막의 드레인전극위에 도포된 보호막 등을 에칭하는 에칭 방법은 몇가지의 문제점이 있다. 첫째, O2/SF6가스를 사용하여 Si 본딩을 갖는 유기절연막으로 된 보호막을 에칭할 경우 에칭속도는 빠르지만 에칭으로 노출되는 Cr금속막 표면의 접촉저항이 높아진다. 둘째 O2/CF4, 가스를 사용하여 Si본딩을 갖는 유기절연막으로 된 보호막을 에칭할 경우 에칭속도가 느려 액정표시장치의 제작시간 및 비용이 증가한다. O2/SF6또는 O2/SF4가스를 사용하여 유기절연막을 에칭했을 때 에칭으로 인하여 노출된 Cr금속막표면의 접촉저항의 변화를 실험한 내용을 제5도에 나타냈다. 상기 실험방법은 O2/SF4, 혹은 O2/SF6가스를 각각 사용하여 유기절연막이 도포된 Cr금속막 표면이 노출되도록 에칭하고, 상기 에칭으로 노출된 Cr 금속막 표면에 별도의 도전체를 접촉시키고, 상기 도전체와 상기 Cr금속 사이의 전류와 전압을 측정하여 에칭으로 노출된 Cr금속막 표면의 접촉저항의 변화를 추정하였다. 제5도의 (1)의 선은 O2/CF4가스를 사용했을 때 에칭으로 인하여 노출된 Cr막표면을 통과하여 흐르는 전류와 전압상태를 나타내고 있다. 제5도의 (2)의 선은 O2/SF6가스를 사용했을 때 에칭으로 인하여 노출된 Cr막 표면을 통과하여 흐르는 전류와 전압상태를 나타내고 있다 상기 제5도의 결과에서 O2/SF6가스를 사용했을 때는 에칭으로 노출된 Cr금속 막표면의 접촉저항이 증가함을 알 수 있고, O2/CF4가스를 사용했을 때는 에칭으로 노출된 Cr금속막표면의 접촉저항이 변화하지 않음을 알 수 있다 상기 O2/SF6가스를 사용했을 때 에칭으로 노출된 Cr금속막의 접촉저항이 높아지는 것을 포토레지스트를 에슁하기 위해 혼합된 O2가스와 노출된 Cr금속표면이 반응하여 CrOx막 즉, Cr금속표면에 산화막이 형성되기 때문으로 추정된다. 또한, O2/CF4가스를 사용했을 때 노출된 Cr금속막표면의 접촉저항에 변화가 없는 것을 포토레지스트를 에슁하기 위한 혼합된 O2가스가 CF4가스의 C와 반응하여 CO가스나 CO2가스로 변하기 때문에 노출된 Cr막에 산화막을 형성하지 못하기 때문으로 추정된다.The transmission and blocking of light can be selectively controlled for each pixel electrode 15 using the above-described principle. The above-described TFT 16 is configured as shown in FIG. 3, which shows, for example, a III-III cross section in FIG. As one example of the various components, when a TFT 16 or the like is formed, a protective film such as a metal layer and an insulating film is laminated, the protective film is etched to form a contact hole 36, and a film, which is in electrical contact with the metal film, And the like. For example, when the protective film on the drain electrode 19b formed of Cr metal or the like is formed of an organic insulating film such as benzocyclobutene (BCB) having Si bonding, the Cr metal film A process for etching the protective film of the first insulating film will be described below. After the photoresist is coated on the protective film, the photoresist is developed to have a predetermined pattern. Subsequently, the structure in which the photoresist is developed in the predetermined pattern is placed in a vacuum furnace, and the structure is exposed to a mixed O 2 / SF 6 gas or O 2 / CF 4 gas. The protective film of the portion where the photoresist is developed through the above-described process is etched into SF 6 gas or CF 4 to form a contact hole, and at the same time, the photoresist remaining on the protective film is ashed by O 2 gas to be removed . The protective film of an organic insulating film having the Si bonding with SF 6, CF if more detail the mechanism to be etched in the fourth gas F reacts Si 4, a volatile matter to the two Si bonding of the organic insulation SF 6, CF 4 gas more quickly, in a free state F group is slow when using a relatively small CF 4 gas when using the SF 6, CF organic insulating film is etched the etching rate is large group of a free state F SF 6 gas exposed to 4 gas because the change . However, the etching method of etching the protective film or the like applied on the drain electrode of the Cr metal film using the conventional SF 6 or CF 4 gas has some problems. First, when a protective film made of an organic insulating film having Si bonding is etched using O 2 / SF 6 gas, the etching rate is fast, but the contact resistance of the surface of the Cr metal film exposed by etching is high. Secondly, when a protective film made of an organic insulating film having Si bonding by using O 2 / CF 4 or gas is etched, the etching rate is slow and the manufacturing time and cost of the liquid crystal display device are increased. FIG. 5 is a graph showing changes in the contact resistance of the exposed surface of the Cr metal film due to etching when the organic insulating film is etched using O 2 / SF 6 or O 2 / SF 4 gas. The test method is to etch the surface of the Cr metal film coated with the organic insulating film by using O 2 / SF 4 or O 2 / SF 6 gas, And the current and voltage between the conductor and the Cr metal were measured to estimate the change in the contact resistance of the surface of the Cr metal film exposed by etching. The line (1) in FIG. 5 shows the current and voltage state flowing through the exposed surface of the Cr film due to etching using O 2 / CF 4 gas. The wire of 5 degrees 2 is O 2 / SF 6 shows a current and voltage state flowing due to etching through the exposed Cr film surface when using a gas wherein the O 2 / SF 6 gas at 5 degrees results The contact resistance of the surface of the Cr metal film exposed by the etching was increased. When the O 2 / CF 4 gas was used, the contact resistance of the surface of the Cr metal film exposed by the etching was not changed. The O 2 / SF 6 gas is used to increase the contact resistance of the Cr metal film exposed by the etching. In order to ashing the photoresist, the mixed O 2 gas and the exposed Cr metal surface react to form a CrOx film, that is, Cr It is presumed that an oxide film is formed on the metal surface. In addition, when the O 2 / CF 4 gas is used, there is no change in the contact resistance of the exposed surface of the Cr metal film. A mixed O 2 gas for spraying the photoresist reacts with C of the CF 4 gas, 2 gas, it is presumed that the oxide film can not be formed on the exposed Cr film.
상기 실험결과를 바탕으로하여 안출된 본 발명의 목적은 Si 본딩을 갖는 유기절연막의 에칭속도를 빠르게 하면서도 상기 에칭으로 인하여 노출되는 Cr금속막의 접촉저항에 영향을 미치지 않는 에칭방법을 이용함으로써 택트타임(tact time)을 감소시켜 액정표시장치의 수율을 향상하고 접촉저항 불량을 줄이기 위한 것이다. Cr금속막과 BCB 등의 유기절연막의 적층구조에서 상기 유기절연막을 에칭하는 본 발명의 에칭방법은 유기절연막 위에 포토레지스트를 도포하고 소정의 패턴이 되도록 현상한 후 일정 비율로 혼합된 O2/CF6가스를 이용하여 Cr금속막이 노출되기 전까지 빠른 속도로 유기절연막을 에칭시키고, 이어서 일정 비율로 혼합된 O2/SF4가스를 이용하여 Cr금속막이 노출되도록 에칭함으로써 노출된 Cr금속막표면의 접촉저항이 높아지지 못하도록 방지하며 액정표시장치의 수율을 향상시키는 것을 특징으로 한다. 이하 Cr금속막과 BCB막의 적층구조를 실시예들어 상기 BCB막을 에칭하는 본 발명의 에칭방법을 설명한다.It is an object of the present invention, which is based on the above experimental results, to provide a method of manufacturing a semiconductor device, which can improve the etching speed of an organic insulating film having Si bonding, tact time to improve the yield of the liquid crystal display device and reduce the contact resistance failure. The etching method of the present invention for etching the organic insulating film in the laminated structure of the organic insulating film of the Cr metal film and a BCB, etc. The O 2 / CF mixed in a predetermined ratio after developing a photoresist is applied on the organic insulating film to be a predetermined pattern 6 gas, the organic insulating film is etched at a high rate until the Cr metal film is exposed, and then the Cr metal film is etched to expose the Cr metal film by using O 2 / SF 4 gas mixed at a predetermined ratio, The resistance is prevented from being increased and the yield of the liquid crystal display device is improved. Hereinafter, the etching method of the present invention for etching the BCB film according to the embodiment of the laminated structure of the Cr metal film and the BCB film will be described.
[실시예][Example]
기판(100)위에 드레인전극(110)이 Cr금속막 등으로된 TFT가 형성되도록 구성하고 상기 기판 위에 Si 본딩을 갖는 유기절연막(138)을 스핀코팅 등의 방법으로 도포한다(제4A도), Si본딩을 갖는 무기절연막 즉, SiNx, SiOx 등을 증착할 수 있지만 본 실시예에서는 층간 쇼트불량을 줄이고 개구율을 높이는데 유리한 유기전연막을 사용하였다. 이어서 유기절연막(138) 위에 포토레지스트(39)를 도포한다(제4B도). 상기 포토레지스트(39) 위에 소정의 패턴으로 형성된 마스크(40)을 맞춘다(제4C도). 상기 마스크 패턴에 따라 상기 포토레지스트(39)를 노광하고 현상한다(제4D도). 상기 현상된 패턴 부분이 이후의 공정에서 에칭을 완료하였을 때 콘택홀(136)이 된다. 이어서 상기 기판(100)위의 포토레지스트가 현상된 구조물을 진공로(60)에 넣고 가스주입구(50)을 통하여 O2/SF6가스를 주입한다. 상기 O2/SF6가스를 진공로에 주입하면 O2가스에 의하여 포토레지스트(39)가 에슁되기 때문에 점점 포토레지스트가 제거되어 도포된 포토레지스트(39)의 두께가 얇아져가며 동시에 포토레지스트(39)가 현상된 부분 즉, 노출된 유기절연막은 SF6가스의 F기와 유기절연막의 Si가 반응하여 SiF4의 휘발성 물질로 변하기 때문에 유기절연막의 에칭이 진행된다. 상기 SF6가스는 이미 언급한 것처럼 CF4가스에 비하여 에칭속도가 빠르기 때문에 에칭공정 시간을 단축하기 위하여 사용한다. 그런데 제5도의 실험결과에서 알 수 있는 것처럼 Cr금속막 등과 SF6가스가 결할하면 Cr금속막에 산화막을 형성하기 때문에 제4B도의 Cr금속막으로 된 드레인전극(110)이 노출되기 직전 까지 유기절연막(138)을 에칭한다. (제4E도). 이어서 O2/CF4가스를 진공로(60)에 주입한다. 상기 O2/CF4가스를 진공로에 주입하면 유기절연막(138) 위에 남아있는 포토레지스트가 O2가스에 의하여 에슁되기 때문에 포토레지스트가 제거되며 동시에 Cr금속막이 노출되기 직전가지 에칭된 상태의 유기절연막(138)은 CF4가스의 F기와 유기절연막의 Si가 반응하여 SiF4의 휘발성 물질로 변하기 때문에 계속 유기절연막(138)에 에칭이 진행되어 Cr금속막으로 된 드레인전극(110)이 노출된다(제4F도). 상기 O2/CF의 에칭 속도는 느리지만 드레인전극(110)이 노출되었을 때 즉, Cr금속막이 노출되었을 때 실험결과에서 이미 언급한 것처럼 노출된 Cr막에 산화막이 형성되지 않기 때문에 Cr막의 접촉저항에 영향을 미치지 않는다. 제4F도에서 상기와 같이 에칭되어 콘택홀(136)이 형성된 상태를 나타내고 있다. 또 다른 실시예로써 제4E도와 같은 작업조건에서 드레인전극(110)이 노출될 때까지 O2/SF6가스로 포토레지스트가 현상된 부분의 유기절연막을 에칭하고 동시에 포토레지스트를 에슁하여 제거한다(제6A도). 상기 에칭으로 노출된 드레인전극(110)표면에 CrOx의 산화막으로 추정되는 막(200)을 별도의 Cr에천트 디핑(etchant dipping)처리 공정으로 제거한다(제6B도), 상기와 같은 본 발명의 에칭방법을 사용함으로써 유기절연막(38)을 빠르게 에칭하여 공정시간을 단축할 수 있으며 또한 O2/SF6가스로 인하여 접촉저항이 높아진 노출된 Cr금속 표면에 산화막형성이 억제되어 접촉저항이 개선되는 효과가 있다.A TFT in which a drain electrode 110 is formed of a Cr metal film or the like is formed on a substrate 100 and an organic insulating film 138 having Si bonding is applied on the substrate by spin coating or the like (FIG. 4A) An inorganic insulating film having Si bonding, that is, SiNx, SiOx, or the like can be deposited. In this embodiment, however, an organic prior film is used which is effective in reducing interlayer short failure and increasing the opening ratio. Then, a photoresist 39 is applied on the organic insulating film 138 (FIG. 4B). A mask 40 formed in a predetermined pattern is aligned on the photoresist 39 (FIG. 4C). The photoresist 39 is exposed and developed according to the mask pattern (FIG. 4D). The developed pattern portion becomes a contact hole 136 when etching is completed in a subsequent process. Then, the structure on which the photoresist is developed on the substrate 100 is put into a vacuum furnace 60 and an O 2 / SF 6 gas is injected through the gas injection port 50. When the O 2 / SF 6 gas is injected into the vacuum furnace, the photoresist 39 is shaken by the O 2 gas. Therefore, the photoresist is gradually removed to reduce the thickness of the applied photoresist 39, ) Is developed, that is, in the exposed organic insulating film, the F group of the SF 6 gas and the Si of the organic insulating film react with each other to change into the volatile substance of SiF 4 , so that the etching of the organic insulating film proceeds. As mentioned above, since the etching rate is faster than the CF 4 gas, the SF 6 gas is used to shorten the etching process time. However, as can be seen from the experimental results of FIG. 5, since an oxide film is formed on the Cr metal film when the Cr metal film and the SF 6 gas are combined with each other, the drain electrode 110 made of the Cr metal film of FIG. 138 are etched. (Fig. 4E). Then, O 2 / CF 4 gas is injected into the vacuum furnace 60. When the O 2 / CF 4 gas is injected into the vacuum furnace, the photoresist remaining on the organic insulating film 138 is ashed by the O 2 gas, so that the photoresist is removed. At the same time, Since the F group of the CF 4 gas and the Si of the organic insulating film react with each other to become a volatile substance of SiF 4, the insulating film 138 is continuously etched in the organic insulating film 138 to expose the drain electrode 110 made of the Cr metal film (Fig. 4F). The O 2 / when the etching rate of the CF is slower when the drain electrode 110 is exposed that is, resistance Cr film contact due to Cr metal film is not an oxide film on the Cr film exposed as already mentioned is formed in result when exposed Lt; / RTI > FIG. 4F shows a state in which the contact hole 136 is formed by etching as described above. As another embodiment, the organic insulating film of the portion where the photoresist is developed with the O 2 / SF 6 gas is etched until the drain electrode 110 is exposed in the same working condition as in FIG. 4E, and the photoresist is simultaneously removed by ashing 6A). A film 200, which is supposed to be an oxide film of CrOx, is removed on the surface of the drain electrode 110 exposed by the etch by a separate etchant dipping process (FIG. 6B) The organic insulating film 38 can be rapidly etched by using the etching method to shorten the process time and the contact resistance is improved by suppressing the formation of the oxide film on the exposed Cr metal surface with the contact resistance increased by the O 2 / SF 6 gas It is effective.
Claims (5)
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KR1019960028525A KR100237005B1 (en) | 1996-07-15 | 1996-07-15 | Etching method of insulating film in liquid crystal display device |
FR9707833A FR2751468A1 (en) | 1996-07-15 | 1997-06-24 | ATTACK METHOD FOR A DEVICE HAVING AN ORGANIC MATERIAL |
GB9714116A GB2315245A (en) | 1996-07-15 | 1997-07-03 | Etching a hole in an organic passivation layer for an LCD |
JP20091797A JPH1096960A (en) | 1996-07-15 | 1997-07-10 | Formation of hole of organic film in production of liquid crystal display device |
DE19730322A DE19730322A1 (en) | 1996-07-15 | 1997-07-15 | Method for selectively etching off a semiconductor component with an organic material |
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KR100529513B1 (en) * | 1998-06-13 | 2006-03-22 | 엘지.필립스 엘시디 주식회사 | Manufacturing method and structure of liquid crystal display device |
KR101041890B1 (en) * | 2004-06-11 | 2011-06-15 | 엘지디스플레이 주식회사 | Method for fabricating of an array substrate for a liquid crystal display device |
CN111554634A (en) * | 2020-05-14 | 2020-08-18 | 京东方科技集团股份有限公司 | Manufacturing method of array substrate, array substrate and display panel |
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KR100811643B1 (en) * | 2002-03-06 | 2008-03-11 | 엘지.필립스 엘시디 주식회사 | 1-step etching method for insulated layer having multi-layer structure |
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Publication number | Priority date | Publication date | Assignee | Title |
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KR100529513B1 (en) * | 1998-06-13 | 2006-03-22 | 엘지.필립스 엘시디 주식회사 | Manufacturing method and structure of liquid crystal display device |
KR101041890B1 (en) * | 2004-06-11 | 2011-06-15 | 엘지디스플레이 주식회사 | Method for fabricating of an array substrate for a liquid crystal display device |
CN111554634A (en) * | 2020-05-14 | 2020-08-18 | 京东方科技集团股份有限公司 | Manufacturing method of array substrate, array substrate and display panel |
CN111554634B (en) * | 2020-05-14 | 2023-01-10 | 京东方科技集团股份有限公司 | Manufacturing method of array substrate, array substrate and display panel |
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