GB2312073A - Method for manufacturing a liquid crystal display - Google Patents

Method for manufacturing a liquid crystal display Download PDF

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Publication number
GB2312073A
GB2312073A GB9707017A GB9707017A GB2312073A GB 2312073 A GB2312073 A GB 2312073A GB 9707017 A GB9707017 A GB 9707017A GB 9707017 A GB9707017 A GB 9707017A GB 2312073 A GB2312073 A GB 2312073A
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forming
manufacturing
layer
organic passivation
insulating layer
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GB2312073B (en
GB9707017D0 (en
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Ki-Hyun Lyu
Hoo-Young Lee
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LG Electronics Inc
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LG Electronics Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133357—Planarisation layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Description

2312073 METHOD FOR MANUFACTURING A LIQUID CRYSTAL DISPLAY The present
invention relates to a method for manufacturing a liquid crystal display (LCD), and more particularly, but not exclusively, to a method for manufacturing an LCD having a thin film transistor (TFT) as a switching element.
In an LCD having TFTs as switching elements, the TFTs are integrated so as to drive and control each pixel. As shown in FIG. 1, in a conventional LCD having a TFT array, almost rectangular pixel electrodes 12 are arranged in rows and columns on a substrate 11. Gate lines 13 are formed along the rows and data lines 14 are formed along the columns.
FIG. 2A is a plan view showing a part of LC1) elements in the LCI) having a TFT array. As shown in FIG.
is 2A, a gate electrode 23 is formed on the substrate and a plurality of data lines 14 perpendicularly crossing gate lines 13 are formed in parallel with each other. TFTs are formed near each crossing point of the gate line 13 and the data line 14.
FIG. 2B is a cross-sectional view taken along line I-I in FIG. 2A. As shown in FIG. 2B, a gate electrode 23 made of Ta is formed on the substrate 11. A gate insulating layer 21 made of SiN, is formed on the whole surface of the substrate including the gate electrode 23 and a semiconductor layer 22 made of a-Si is formed on the gate insulating layer 21. An ohmic contact layer 33 made of n+ aSi is formed on the semiconductor layer. Source and drain electrodes 24, 34 made of Mo are formed on the ohmic contact layer 33. Then, an organic layer 10 2 made of organic material is formed as a passivation layer.
The organic material has a smoother surface profile than inorganic materials. Therefore, when the organic material is deposited on the surface of the LCD, which has an uneven surface profile due to the multi-layered elements, the stepped surface can be flattened. Thus, defects such as non-uniform orientation condition or misalignment of liquid crystal molecules due to the stepped surface can be reduced. Also, a higher aperture ratio can be obtained by increasing the area of pixel electrodes.
Next, an inorganic insulating layer 15 made of SiO, or SiNxl is formed on the organic passivation layer 10. A contact hole is formed and finally, a pixel electrode 12 made of a transparent conductive material such as ITO is formed.
As described above, the passivation layer of the conventional LCD has a layered structure having organic passivation layer 10 and inorganic insulating layer 15. The inorganic insulating layer 15 is formed over the organic passivation layer in order to assist the adhesion property of the ITO layer onto the passivation layer. This is because the organic passivation layer does not provide a good adhesion to the ITO layer.
There are two ways of forming the organic passivation layer and inorganic insulating layer: one is to sequentially deposit the organic passivation layer and inorganic insulating layer and pattern them simultaneously, and the other is to deposit and pattern the organic passivation layer first and then form the inoraanic insulating layer.
3 Firstly, the former has the following problem. The process of patterning the organic passivation layer and inorganic insulating layer includes utilizing an organic solution, such as a mixture of N-Methyl-Pyrolidone (%MP), alcohol and amine, to remove the photoresist. This may result in the insulating layer swelling or expanding because such an organic solution can penetrate through the interface between the organic passivation layer and the inorganic insulating layer.
Secondly, the latter also has a problem in that two patterning steps are needed for forming the passivation/ insulating layer. In addition, the drain electrode may be disconnected because the difference in thermal expansion coefficients between the organic passivation layer and inorganic insulating layer may produce cracks in the contact hole area.
Accordingly, the present invention is directed to a method for manufacturing a liquid crystal display, that substantially obviates one or more of the problems arising from limitations and disadvantages of the related art. An object of the present invention is to provide a method for manufacturing a TFT, that is free from the above mentioned problems. 25 Additional features and advantages of the invention will be set forth in description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the method and the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
4 To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method for manufacturing a liquid crystal display includes the steps of forming gate lines, data lines and a TFT array on a substrate, depositing an organic passivation layer to cover the above mentioned elements including the TFT array, coating a photoresist on the organic passivation layer, developing the photoresist, etching the organic passivation layer along the developed pattern of the photoresist, removing the photoresist and converting the surface of the organic passivation layer into SiO. by ashing with 0,, depositing an ITO layer, a transparent conductive layer, coating and developing a photoresist, forming a pixel electrode by etching the ITO layer along the developed pattern of the photoresist and removing the photoresist by ashing with 0..
In another aspect, the LCD according to the present invention includes a substrate, gate lines formed on the substrate, a gate insulating layer covering the gate lines, a semiconductor layer formed on the gate insulating layer, source and drain electrodes formed on the semiconductor layer, an organic passivation layer covering the whole surface of the substrate including the source and drain electrodes, an inorganic insulating layer formed by converting the surface of the organic passivation layer into SiO, by ashing with 02. contact holes formed in the passivation/insulating layer located over the drain electrodes and pixel electrodes formed on the inorganic insulating layer, each of the pixel electrodes being connected with the drain electrode through the contact hole.
In another aspect, the LCD with a stagger type TFT array according to the present invention includes a substrate, source and drain electrodes formed on the substrate, a semiconductor layer formed on the source and drain electrodes, a gate insulating layer formed on the semiconductor layer, gate electrodes formed on the gate insulating layer, an organic passivation layer covering the whole surface of the substrate including the gate electrodes, an inorganic insulating layer formed by making the surface of the organic passivation layer into S'02, contact holes in the passivation/insulating layers located over the drain electrodes and pixel electrodes formed on the inorganic insulating layer, each of the pixel electrode being connected with the drain electrode through the contact hole.
In another aspect, a method of manufacturing an LCD on a substrate includes the steps of forming a thin film transistor on the substrate; depositing an organic passivation layer over the thin film transistor; forming a patterned photoresist over the organic passivation layer; etching the organic passivation layer to form a contact hole over one of source and drain of the transistor; removing the photoresist; forming an SiO, layer at a surface of the organic passivation layer by 02 ashing; and forming a pixel electrode contacting one of the source and drain of the transistor through the contact hole.
In another aspect, a method of manufacturing an LCD on a substrate, the method comprising the steps of forming a transistor having a gate, a gate insulating layer, a source, and a drain on the substrate; forming a data 'Line connected to the source of the transistor; forming a gate line connected to the gate of the 6 transistor; forming a organic passivation layer over the transistor, the passivation layer being made of an organic material having an Si bond structure such as BCB (bezocyclobutene); and performing a plasma treatment on the passivation layer using a gas including oxygen.
In a further aspect, a method of manufacturing an LCD on a substrate, the method comprising the steps of forming a thin film transistor having a gate, a gate insulating layer, a source, and a drain on the substrate; forming a data line connected to the source of the transistor; forming a gate line connected to the gate of the transistor; forming an organic passivation layer over the thin film transistor, the organic passivation layer being made of an organic material having an Si bond structure such as BCB (bezoeyclobutene); forming a patterned photoresist over the organic passivation layer; etching the organic passivation layer to form a contact hole over one of the source and the drain of the transistor; removing the photoresist; forming an Sio.
layer at a surface of the organic passivation layer by 0, ashing; and forming a pixel electrode contacting one of the source and the drain of the thin film transistor through the contact hole.
In a further aspect, the passivation layer may include one of Fluorinated polyimide, teflon, cytop, fluoropolyarylether, Fluorinated para-xylene, PFCB(perfluorocyclobutane), and BCB (bezocyclobutene). The organic passivation layer may also be an insulating layer. 30 An organic insulating layer may be used instead of an organic passivation layer in the invention and the embodiments.
7 It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
For a better understanding of the invention, embodiments will now be described by way of example, with reference to the accompanying drawings, in which:
FIG. 1 is a circuit diagram of a conventional LCD; FIG. 2A is an enlarged plan view showing TFTs and parts of pixel electrodes in the conventional LCD; FIG. 2B is a cross-sectional view taken along line I-I of FIG. 2A; FIGs. 3A to 3F are cross-sectional views showing a method for manufacturing an LCD according to a first embodiment of the present invention; and FIGs. 4A to 4D are cross-sectional views showing a method for manufacturing an LCD according to a second embodiment of the present invention.
First Preferred Embodiment As shown in FIG. 3, a metal such as aluminum is deposited on the whole surface of a substrate 111 and patterned to form a gate line and a gate electrode 123.
A gate insulating layer 121 is deposited on the whole surface of the substrate on which the metal layer has been already patterned (FIG. 3A). An a-Si layer 122 and an n+ a-Si layer 133 are deposited (FIG. 3B) and patterned to form a-Si layer 122 and an n' a-Si layer 133 (FIG. 3C) A Cr layer, for example, is deposited and patterned to form a source electrode 124 and a drain electrode 134. Then, the exposed portion of the n' a-Si layer 133 is etched (FIG. 3D).
8 Referring to FIG. 3E, passivation layer 110 is formed on the whole surface by coating an organic material having an -Si-0 bond structure. A photoresist is coated on the passivation layer and developed. A contact hole 143 is formed using a dry-etching method, for example. The photoresist is removed by 0, ashing. An inorganic insulating layer 115 is converted by oxidizing the surface of the organic passivation layer into Sio. (FIG. 3E). If the organic passivation layer covers the gate and data line pads, it could be simultaneously etched when the contact hole is formed by using the dry-etching method (not shown in the drawings).
Next, referring to FIG. 3F, an ITO layer is deposited. A photoresist is coated and developed. A is pixel electrode 112 is formed by etching the ITO layer according to the developed pattern of the photoresist.
The remaining photoresist could be removed by 0, ashing (FIG. 3F).
Second Preferred Embodiment Referring to FIG. 4A, a metal such as Cr is deposited on a whole surface of a substrate 111 and patterned to form a data line, a source electrode 124, and a drain electrode 134. An a-Si layer, an SiN, layer, and an A1 laver are deposited on the whole surface of the substrate on which the Cr layer has been already patterned (FIG. 4A). These layers are patterned to form a semiconductor layer 122, a gate insulating layer 121, a gate line, and a gate electrode 123 (FIG. 4B).
A passivation layer 110 is formed by coating an organic material on the whole surface having an -S 1 i_o bond structure. Many different compounds having the -Si 0 chemical bond are contemplated in the present invention. An example of such compounds includes 9 benzoeyclobutene (BCB). A photoresist is coated on the passivation layer and developed. A contact hole 143 is formed using a dry-etching method, for example. The photoresist is removed by 02 ashing. An inorganic insulating layer 115 is formed by continuously ashing with 02 for a certain period of time and converting the surface of the organic passivation layer 110 into an SiO, layer (FIG. 4C). If an organic passivation layer covers the gate and data line pads, it could be simultaneously 10 etched when the contact hole is formed by using a dry- etching method (not shown in the drawings).
Referring to FIG. 4D, an ITO layer is deposited. A photoresist is coated and developed. The pixel electrode 112 is formed by etching the ITO layer according to the is developed pattern of the photoresist by dry-etching or wet-etching. The remaining photoresist could be removed by ashing with o, (FIG. 4D).
The chemical structure of BCB may be as follows:
CH3 CH3 CH 1 1 CH-- CH==CH-Si-0 S11 - 1 ::ED- 1 0 CH2 CHd CH3 CH330 L 0 J2 or Me Me EQI" 1 1.
Si-0-81 1 1 L Me Me In an alternative embodiment, the organic passivation layer 110 receives a plasma treatment using a gas including oxygen to form an Sio, layer (constituting inorganic insulating layer 115).
The characteristics of the above mentioned methods according to the present invention are described below.
The photoresist is coated on an organic passivation layer. The photoresist is exposed and developed into a desired pattern by using a mask. The organic passivation layer is patterned according to the developed pattern of the photoresist by using a dry-etching method. The remaining photoresist is removed by 0, ashing or using a wet-etching method (wet-strip). In the case of using 0, ashing, an inorganic insulating layer 115 can be formed is by continuously ashing the organic passivation layer with 0. for a certain period of time thereby converting the surface of the organic passivation layer into SiO_ Accordingly, the three steps of (1) etching the organic passivation layer, (2) removing the photoresist, and (3) ashing the organic passivation layer with 0, can be sequentially performed in a dry-etching chamber at once.
Thus, since the three steps are sequentially performed in a dry-etching chamber at once, the number of process steps are reduced in the embodiments.
Alternatively, the photoresist can be removed by using a wet-etching (wet-strip method). In this case, a mixture of alcohol, acetone, H,SO, and HNO, may be used as a solution in the wet-strip method among various methods for removing the photoresist. Then, an inorganic insulating layer can be formed on the organic passivation layer by converting the surface of an organic passivation layer 110 to an Sio, layer by ashing with 0, after the photoresist on the organic passiva.ion layer is removed.
Also, the undesirable swelling of the insulating layer in the conventional method caused by the penetration of an organic solution such as a mixture of NMP, alcohol, and amine through the interface between the organic passivation layer and the inorganic insulating layer can be prevented, because the inorganic insulating layer is formed by converting the surface of the organic passivation layer to an SiO, layer.
Moreover, the SiO. layer over the passivation layer according to the present invention may prevent the problem of the disconnection or detachment between the pixel and drain electrodes which is caused by cracks in the contact hole area resulting from a difference in thermal expansion coefficients between the organic is passivation layer and inorganic insulating layer. Such difference in thermal expansion coefficient may be overcome by the present invention.
It will be apparent to those skilled in the art that various modifications and variations can be made in the method for manufacturing a liquid crystal display of the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present inventions cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
12

Claims (34)

Claims:
1. A method for manufacturing an LCD on a substrate, the method comprising: forming a thin film transistor on the substrate; forming an organic passivation layer over the thin film transistor; forming a patterned photoresist over the organic passivation layer; etching the organic passivation layer to form a contact hole over one of source and drain of the transistor; removing the photoresist; forming an inorganic layer at a surface of the organic passivation layer by 0, ashing; and forming a pixel electrode contacting one of the source and drain of the transistor through the contact hole.
2. The method for manufacturing an LCD according to claim 1, wherein the step of removing the photoresist includes 0, ashing.
3. The method for manufacturing an LCD according to claim 2, wherein the 0, ashing step is carried out continuously until the photoresist is removed and the inorganic layer is formed at the surface of the organic passivation layer.
4. The method for manufacturing an LCD according to claim 1, 2 or 3, wherein the organic passivation layer includes at least Si bond structure.
13
5. The method for manufacturing an LCD according to claim 2, 3 or 4, wherein the step of removing the photoresist by 02 ashing and the step of making an inorganic insulating layer is continuously carried out.
6. The method for manufacturing an LCD according to any one of the preceding claims, the step of forming the inorganic layer includes the step of converting the surface of the organic passivation layer to SiO. by 0ashing.
7. The method for manufacturing an LCD according to any one of the preceding claims, wherein the step of removing the photoresist includes a wet-etching method.
8. The method for manufacturing an LCD according to claim 7, wherein the wet-etching method uses a mixture of alcohol, acetone, HN03 and HSO,.
9. The method for manufacturing an LCD according to any one of the preceding claims, wherein the organic passivation layer is made of an organic material having an Si bond structure.
10. The method for manufacturing an LCD according to any one of the preceding claims, wherein the organic passivation layer is made of BCB (bezocyclobutene).
11. The method for manufacturing an LCD according to claim 1, wherein the organic passivation layer includes one of Fluorinated polyimide, teflon, cytop, fluoropolyarylether, Fluorinated para-xylene, PFCB(perfluorocyclobutane), and BCB (bezocyclobutene).
14
12. A method for manufacturing an LCD on a substrate, the method comprising: forming a transistor having a gate, a gate insulating layer, a source, and a drain on the substrate; forming a data line connected to the source of the transistor; forming a gate line connected to the gate of the transistor; forming a passivation layer over the transistor, the passivation layer including at least one of Fluorinated polyimide, teflon, cytop, fluoropolyarylether, Fluorinated para-xylene, PFCB(perfluorocyclobutane), and BCB(bezocyclobutene); and performing a plasma treatment on the passivation layer using a gas including oxygen.
13. The method for manufacturing an LCD according to claim 12, wherein the passivation layer includes Si bond structure.
14. The method for manufacturing an LCD according to claim 12 or 13, wherein the step of performing the plasma treatment forms a silicon oxide at a surface of the passivation layer.
15. A method for manufacturing an LCD on a substrate, the method comprising: forming a thin film transistor having a gate, a gate insulating layer, a source, and a drain on the substrate; forming a data line connected to the source of the transistor; forming a gate line connected to the gate of the transistor; forming an organic passivation layer over the thin film transistor, the organic passivation layer including one of Fluorinated polyimide, teflon, cytop, fluoropolyarylether, Fluorinated para-xylene, PFCB(perfluorocyclobutane), and BCB(bezocyclobutene); forming a patterned photoresist over the organic passivation layer; etching the organic passivation layer to form a contact hole over one of the source and the drain of the transistor; removing the photoresist; forming an inorganic layer at a surface of the organic passivation layer by 0, ashing; and forming a pixel electrode contacting one of the source and the drain of the thin. film transistor through the contact hole.
16. The method for manufacturing an LCD according to claim 15, wherein the step of removing the photoresist includes 0. ashing.
17. The method for manufacturing an LCD according to claim 16, wherein the 02 ashing step is carried out continuously until the photoresist is removed and the inorganic layer is formed at the.surface of the organic passivation layer.
18. The method for manufacturing an LCD according to claim 15, 16 or 17, wherein the organic passivation layer includes at least Si bond structure.
19. The method for manufacturing an LCD according to claim 15, 16, 17 or 18, wherein the step of removing the 16 photoresist by 0. ashing and the step of forming the inorganic layer is continuously carried out.
20. The method for manufacturing an LCD according to claim 19, the step of forming the inorganic insulating layer is to convert the surface of the organic passivation layer into SiO- by 0. ashing.
21. The method for manufacturing an LCD according to any one of claims 15 to 21, wherein the step of removing the photoresist includes a wetetching method.
22. The method for manufacturing an LCD according to claim 21, wherein the wet-etching method uses a mixture of alcohol, acetone, HN03 and H,S04.
23. A method of forming a semiconductor device passivation/insulating layer, the method of comprising forming an organic passivation/insulating layer, and converting a surface of said organic passivation/ insulating layer into an inorganic insulating layer.
24. A method of manufacturing an LCD device, the method comprising forming a semiconductor switching device, forming an organic passivation/insulating layer, forming a patterned photoresist over the organic passivation/insulating layer, removing the photoresist, and converting a surface of said organic passivation/insulating layer into a inorganic insulating layer.
17
25. A method according to claim 23 or 24, wherein said organic passivation/insulating layer comprises organic 1 material having an-Si-C bond structure. i
26. A method according to claims 23, 24 or 25, wherein said organic passivation/insulating layer comprises BCB or other polymer comprising benzocyclobutene.
27. A method according to claim 23, 24, 25 or 26, wherein said organic passivation/insulating layer has a chemical structure as illustrated hereinbefore.
28. A method according to claims 23, 24, 25, 26 or 27, wherein said inorganic insulating layer is formed by applying oxygen to said organic passivation/insulating layer such that an SiO, layer is formed.
29. A method according to claim 23, 24, 25, 26, 27 or 28, wherein said inorganic insulating layer is formed by 0, ashing to convert a surface of said organic pass ivation/ insulating layer into an Sio. layer.
30. A method according to any one of claims 24 to 29, wherein the removal of said photoresist and the forming of said inorganic insulating layer are performed in a single process step.
31. A method according to claim 30, wherein said process step comprises the step of 0. ashing.
32. A method according to any one of claims 23 to 31, wherein the semiconductor device is a thin film transistor.
18
33. A method substantially according to the first or second embodiment hereinbefore described and illustrated.
34. A method substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of Figs. 3A to 4D of the accompanying drawings.
GB9707017A 1996-04-08 1997-04-07 Method for manufacturing liquid crystal display Expired - Lifetime GB2312073B (en)

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JP4023866B2 (en) 2007-12-19
DE19714510C2 (en) 2000-05-25
FR2747233A1 (en) 1997-10-10
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KR100202231B1 (en) 1999-06-15
GB9707017D0 (en) 1997-05-28

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