KR980005688A

KR980005688A - Method for planarizing semiconductor devices

Info

Publication number: KR980005688A
Application number: KR1019960026355A
Authority: KR
Inventors: 조성천
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1996-06-29
Filing date: 1996-06-29
Publication date: 1998-03-30

Abstract

본 발명은 반도체 소자의 평탄화 방법을 개시한다. 개시된 본 발명의 반도체 소자의 평탄화 방법은 실리콘 기판상에 질화막을 증착하는 단계; 질화막을 소자 분리 예정 영역의 실리콘 기판이 노출되도록 식각하는 단계; 식각이 이루어진 질화막을 마스크로하여 노출된 실리콘 기판을 소정깊이로 식각하여 트렌치를 형성하는 단게; 트렌치가 형성된 전체 구조물의 상부에 트렌치가 충분히 매립되도록 제 1층간 절연막을 증착하는 단계; 제 1층간 절연막 상부에 식각 저지층을 형성하는 단계; 식각 저지층의 상부에 제2층간 절연막을 소정 두께로 증착하는 단계; 및 표면이 평탄하게 되도록 식각 저지층이 노출될때까지 제2층간 절연막, 질화막 및 제1층간 절연막을 식각하는 단계를 포함하는 것을 특징으로 한다.The present invention discloses a method for planarizing a semiconductor device. A method of planarizing a semiconductor device of the present invention includes: depositing a nitride film on a silicon substrate; Etching the nitride film to expose the silicon substrate in the device isolation region; Etching the exposed silicon substrate to a predetermined depth using the etched nitride film as a mask to form a trench; Depositing a first interlayer insulating film so that the trench is sufficiently filled in the upper portion of the entire structure in which the trench is formed; Forming an etch stop layer on the first interlayer insulating film; Depositing a second interlayer insulating film on the etch stop layer to a predetermined thickness; And etching the second interlayer insulating film, the nitride film, and the first interlayer insulating film until the etching stop layer is exposed so that the surface becomes flat.

Description

A method of planarizing a semiconductor device.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2a도 내지 제2c도는 본 발명의 실시예에 따른 반도체 소자의 평탄화 방법을 설명하기 위한 단면도.FIGS. 2a through 2c are cross-sectional views for explaining a planarizing method of a semiconductor device according to an embodiment of the present invention; FIG.

Claims

Depositing a nitride film on the silicon substrate; Etching the nitride film to expose the silicon substrate in the device isolation region; Etching the exposed silicon substrate to a predetermined depth using the etched nitride film as a mask to form a trench; Depositing a first interlayer insulating film so that the trench is sufficiently filled in the upper portion of the entire structure in which the trench is formed; Forming an etch stop layer on the first interlayer insulating film; Depositing a second interlayer insulating film on the etch stop layer to a predetermined thickness; And etching the second interlayer insulating film, the nitride film, and the first interlayer insulating film until the etching stopper layer is exposed so that the surface is flattened.

The flattening method of a semiconductor device according to claim 1, wherein the etch stop layer is a nitride film or polysilicon.

Depositing a nitride film on the silicon substrate; Etching the nitride film to expose the silicon substrate in the device isolation region; Etching the exposed silicon substrate to a predetermined depth using the etched nitride film as a mask to form a trench; Depositing an interlayer insulating film so that the trench is sufficiently filled in the upper portion of the entire structure; Forming an etch stop layer thereon; Patterning the etch stop layer so that the etch stop layer remains only on the interlayer insulating film in the area where the active area area is narrow; And etching the interlayer insulating film and the etching stopper layer until the etching stopper layer is exposed so that the surface is flattened.

The flattening method of claim 3, wherein the etch stop layer is a ground film or polysilicon.

※ Note: Published by the first application.