KR970053470A

KR970053470A - Device Separation Method of Semiconductor Device

Info

Publication number: KR970053470A
Application number: KR1019950066130A
Authority: KR
Inventors: 노광명
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1995-12-29
Filing date: 1995-12-29
Publication date: 1997-07-31

Abstract

본 발명은 반도체소자의 소자분리막 제조방법에 관한 것으로, 본 발명은 반도체기판을 식각하여 트렌치를 형성하고, 상기 트렌치가 형성된 부위의 반도체기판의 표면에 제2산화막을 형성하고, 상기 트렌치에 전체효과에 의한 다결정실리콘층을 형성하고, 상기 다결정실리콘층의 일정 두께를 식각하고, 상기 트렌치의 빈공간에 제3산화막을 형성하고, 상기 실리콘질화막을 제거하고, 활성영역에 게이트, 소오스/드레인 접합을 형성하고, 상기 제3산화막의 상부에 제4산화막을 형성하고, 금속배선용 콘택홀 마스크를 사용하여 제4산화막패턴과, 제3산화막패턴을 형성하고, 콘택홀을 형성하고, 상기 콘택홀에 매립되는 금속배선을 형성하므로써, 소자분리막의 특성을 향상한다.The present invention relates to a method of manufacturing a device isolation film of a semiconductor device, the present invention is to form a trench by etching the semiconductor substrate, a second oxide film on the surface of the semiconductor substrate of the trench is formed, the effect on the trench Forming a polysilicon layer, etching a predetermined thickness of the polysilicon layer, forming a third oxide film in the empty space of the trench, removing the silicon nitride film, and forming a gate and source / drain junction in the active region. A fourth oxide film and a third oxide film pattern by using a contact hole mask for metal wiring, forming a contact hole, and filling the contact hole By forming a metal wiring, the characteristics of the device isolation film are improved.

Description

Device Separation Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 의한 반도체소자의 소자분리막을 설명하기 위한 반도체회로의 평면도.1 is a plan view of a semiconductor circuit for explaining a device isolation film of a semiconductor device according to the present invention.

Claims

Forming a pad oxide film and a silicon nitride film over the semiconductor substrate, forming the silicon nitride film pattern and the pad oxide film pattern exposing the device isolation region, and subsequently etching the semiconductor substrate to form a trench; Forming a second oxide film on the surface of the semiconductor substrate having the portion formed thereon, forming a polysilicon layer in the trench for device isolation due to an electric field effect, and etching a predetermined thickness of the polysilicon layer; Forming a third oxide film in the empty space of the trench, removing the silicon nitride film, forming a gate and a source / drain junction in an active region, and forming a fourth oxide film on the third oxide film. Forming a fourth oxide layer pattern, a third oxide layer pattern, and forming a contact hole using a contact hole mask for metal wiring; And forming a metal wiring buried in the contact hole.

The method of claim 1, wherein the third oxide layer is formed by chemical layer adhesion or oxidation.

※ Note: The disclosure is based on the initial application.