KR980004969A - Sense amplifier - Google Patents

Sense amplifier Download PDF

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Publication number
KR980004969A
KR980004969A KR1019960026475A KR19960026475A KR980004969A KR 980004969 A KR980004969 A KR 980004969A KR 1019960026475 A KR1019960026475 A KR 1019960026475A KR 19960026475 A KR19960026475 A KR 19960026475A KR 980004969 A KR980004969 A KR 980004969A
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KR
South Korea
Prior art keywords
sense amplifier
signal
difference
amplifying means
strobe signal
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Application number
KR1019960026475A
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Korean (ko)
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KR100418582B1 (en
Inventor
김택무
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019960026475A priority Critical patent/KR100418582B1/en
Publication of KR980004969A publication Critical patent/KR980004969A/en
Application granted granted Critical
Publication of KR100418582B1 publication Critical patent/KR100418582B1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08—Control thereof

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  • Dram (AREA)
  • Static Random-Access Memory (AREA)

Abstract

본 발명은 안정된 동작특성을 가진 센스증폭기에 관한 것으로서, 크로스 커플(Cross-coupled)된 형태의 회로로 구성되어 비트라인 입력신호의 차이를 크게하기 위한 입력신호차 증폭수단; 스트로브 신호(ST)를 지연시키기 위한 인버터 지연수단; 및 증폭된 출력신호를 읽어내기 위한 증폭수단을 포함하고 있어서 사이클 타임(Cycle Time)을 늦추지 않고도 충분한 센싱 마아진(Sensing Margin)을 만들어 줄 수 있고 외부의 영향에도 안정된 동작을 수행하는 효과가 있다.The present invention relates to a sense amplifier having stable operation characteristics, and more particularly, to a sense amplifier having a stable operation characteristic, comprising: input signal difference amplifying means for constituting a cross-coupled type circuit to increase a difference of a bit line input signal; Inverter delay means for delaying the strobe signal ST; And amplifying means for reading out the amplified output signal. Therefore, it is possible to provide a sufficient sensing margin without slowing the cycle time and to perform a stable operation even with external influence.

Description

센스 증폭기Sense amplifier

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2도는 본 발명의 일 실시예에 따른 센스증폭기의 회로도이다.FIG. 2 is a circuit diagram of a sense amplifier according to an embodiment of the present invention. FIG.

Claims (3)

반도체 메모리 장치의 비트라인의 전압차를 증폭하여 출력하는 센스 증폭기에 있어서, 크로스 커플(Cross-coupled)된 형태의 회로로 구성되어 비트라인 입력신호의 차이를 크게하기 위한 입력신호차 증폭수단(1); 상기 입력신호차 증폭수단(1)에 인가되는 스트로브신호(ST)를 지연시켜, 출력신호를 읽어내기 위하여 인가되는 새로운 스트로브신호(ST1)로 만드는 인버터 지연수단(2); 및 상기 인버터 지연수단(2)으로부터 인가되는 스트로브신호(ST1)에 따라 증폭된 출력신호를 읽어내기 위한 증폭수단(3)을 구비하고 있는 것을 특징으로 하는 센스증폭기.A sense amplifier for amplifying and outputting a voltage difference between bit lines of a semiconductor memory device, the sense amplifier comprising input-signal difference amplifying means (1) for increasing the difference between bit line input signals, the cross- ); An inverter delay means (2) for delaying a strobe signal (ST) applied to the input signal difference amplifying means (1) and converting the strobe signal (ST) into a new strobe signal (ST1) to be read to read an output signal; And an amplifying means (3) for reading out the amplified output signal in accordance with the strobe signal (ST1) applied from the inverter delay means (2). 제1항에 있어서, 상기 입력신호차 증폭수단(1)은 크로스 커플된 형태의 NMOS(N76, N77, N79 및 N80)와 PMOS(N82)로 구성되어, N76과 N77은 소오스와 드레인이 직렬로 상호연결되고 이 연결점은 다시 N79의 게이트와 PMOS인 N82의 소오스와 연결되었으며, N79와 N80의 소오스와 드레인이 또한 직렬로 상호 연결되어 이 연결점은 다시 N76의 게이트로 연결된 것을 특징으로 하는 센스증폭기.2. The semiconductor device according to claim 1, wherein the input signal difference amplifying means (1) comprises cross-coupled NMOSs N76, N77, N79 and N80 and a PMOS N82, wherein N76 and N77 are connected in series And the connection point is again connected to the gate of N79 and the source of N82 which is the PMOS, and the sources and drains of N79 and N80 are also connected in series so that this connection point is again connected to the gate of N76. 제1항에 있어서, 상기 인버터(inverter) 지연부(2)는 6개의 인버터가 직렬연결되어 지연된 스트로브 신호(ST1)를 출력하는 것을 특징으로 하는 센스증폭기.The sense amplifier according to claim 1, wherein the inverter delay unit (2) outputs a delayed strobe signal (ST1) by serially connecting six inverters. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960026475A 1996-06-29 1996-06-29 Sense amplifiers KR100418582B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960026475A KR100418582B1 (en) 1996-06-29 1996-06-29 Sense amplifiers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960026475A KR100418582B1 (en) 1996-06-29 1996-06-29 Sense amplifiers

Publications (2)

Publication Number Publication Date
KR980004969A true KR980004969A (en) 1998-03-30
KR100418582B1 KR100418582B1 (en) 2004-05-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960026475A KR100418582B1 (en) 1996-06-29 1996-06-29 Sense amplifiers

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Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940004516B1 (en) * 1991-08-14 1994-05-25 삼성전자 주식회사 High-speed sensing device of the semiconductor memory
KR0172419B1 (en) * 1995-09-14 1999-03-30 김광호 Sense amp. control circuit of semiconductor memory device
KR0179853B1 (en) * 1995-10-31 1999-04-15 문정환 Sense amplifier power generating circuit
KR100192586B1 (en) * 1996-06-27 1999-06-15 윤종용 Current Sense Amplifiers in Semiconductor Memory Devices

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KR100418582B1 (en) 2004-05-07

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