KR970078462A - Data and control signal transmission circuit - Google Patents

Data and control signal transmission circuit Download PDF

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Publication number
KR970078462A
KR970078462A KR1019960015916A KR19960015916A KR970078462A KR 970078462 A KR970078462 A KR 970078462A KR 1019960015916 A KR1019960015916 A KR 1019960015916A KR 19960015916 A KR19960015916 A KR 19960015916A KR 970078462 A KR970078462 A KR 970078462A
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KR
South Korea
Prior art keywords
signal
analog
data
processing means
control signal
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KR1019960015916A
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Korean (ko)
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KR100189063B1 (en
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박승호
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이대원
삼성항공산업 주식회사
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Priority to KR1019960015916A priority Critical patent/KR100189063B1/en
Publication of KR970078462A publication Critical patent/KR970078462A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/765—Interface circuits between an apparatus for recording and another apparatus
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Communication Control (AREA)
  • Television Systems (AREA)

Abstract

이 발명은 데이터 및 제어신호 전송회로에 관한 것으로서, 영상신호를 입력받아 아날로그 영상처리를 하며, 이 아날로그 영상신호를 디지털 영상신호로 변환시켜 출력하고, 또 영상신호의 디스플레이에 필요한 제어신호를 출력하는 아날로그 신호처리수단, 상기한 아날로그 신호처리수단으로부터 입력된, 시간적으로 변화하는 디지털 영상신호 데이터를 일시적으로 유지하고 있다가 상기한 아날로그 신호처리수단으로부터 입력된 특정신호에 동기시켜 원하는 시각에 출력하는 제1임시 기억수단, 상기한 아날로그 신호처리수단으로부터 입력된 제어신호를 일시적으로 유지하고 있다가 상기한 아날로그 신호처리수단으로부터 입력된 특정신호에 동기시켜 원하는 시각에 출력하는 제2임시 기억수단, 상기한 제1임시 기억수단으로부터 출력된 디지털 영상신호 데이터와 상기한 제2임시 기억수단으로부터 출력된 제어신호를 입력받아, 디지털 영상신호처리를 하여 상기한 아날로그 신호처리수단으로부터 입력된 특정신호에 동기시켜 원하는 시각에 출력하는 디지털 신호처리수단을 포함하여 이루어져서, 데이터 신호뿐만아니라 제어신호도 래치를 통하여 동일한 시간 간격으로 동기를 맞춰 송수신하므로써 왜곡없는 정확한 신호전달과 송수신의 투명성 보장, 이에 따른 선명한 화질의 영상신호를 얻을 수 있는 효과를 가진 데이터 및 제어신호 전송회로에 관한 것이다.The present invention relates to a data and control signal transmission circuit, and more particularly, to a data and control signal transmission circuit which receives an image signal and performs an analog image process, converts the analog image signal into a digital image signal and outputs the control signal, An analog signal processing means for temporarily holding the digital image signal data temporally changing inputted from the analog signal processing means and outputting the digital image signal data at a desired time in synchronization with the specific signal inputted from the analog signal processing means; 1 temporary storage means for temporarily storing the control signal inputted from the analog signal processing means and outputting it at a desired time in synchronization with the specific signal inputted from the analog signal processing means, The digital image output from the first temporary storage means Digital signal processing means for receiving the phase signal data and the control signal outputted from the second temporary storage means and for performing digital image signal processing and outputting it at a desired time in synchronization with the specific signal inputted from the analog signal processing means So that not only the data signal but also the control signal can be synchronously transmitted and received at the same time intervals through the latches to ensure accurate signal transmission without distortion and transparency of transmission and reception, And a control signal transmission circuit.

Description

데이터 및 제어신호 전송회로Data and control signal transmission circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2도는 이 발명의 실시예에 따른 데이터 및 제어신호 전송회로를 나타낸 블록도이다. 제3도는 이 발명의 실시예에 따른 데이터 및 제어신호 전송회로를 외부장치와 접속하는 형태를 나타낸 블록도이다.FIG. 2 is a block diagram showing a data and control signal transmission circuit according to an embodiment of the present invention. FIG. 3 is a block diagram showing a form in which a data and control signal transmission circuit according to an embodiment of the present invention is connected to an external device.

Claims (3)

영상신호를 입력받아 아날로그 영상처리를 하며, 이 아날로그 영상신호를 디지털 영상신호로 변환시켜 출력하고, 또 영상신호의 디스플레이에 필요한 제어신호를 출력하는 아날로그 신호처리수단, 상기한 아날로그 신호처리수단으로부터 입력된, 시간적으로 변화하는 디지털 영상신호 데이터를 일시적으로 유지하고 있다가 상기한 아날로그 신호처리수단으로부터 입력된 특정신호에 동기시켜 원하는 시각에 출력하는 제1임시 기억수단, 상기한 아날로그 신호처리수단으로부터 입력된 제어신호를 일시적으로 유지하고 있다가 상기한 아날로그 신호처리수단으로부터 입력된 특정신호에 동기시켜 원하는 시각에 출력하는 제2임시 기억수단, 상기한 제1임시 기억수단으로부터 출력된 디지털 영상신호 데이터와 상기한 제2임시 기억수단으로부터 출력된 제어신호를 입력받아, 디지털 영상신호처리를 하여 상기한 아날로그 신호처리수단으로부터 입력된 특정신호에 동기시켜 원하는 시각에 출력하는 디지털 신호처리수단을 포함하여 이루어지는 데이터 및 제어신호 전송회로.An analog signal processing means for receiving an image signal and performing analog image processing, converting the analog image signal into a digital image signal and outputting it, and outputting a control signal necessary for displaying the image signal, A first temporary storage means for temporarily holding digital image signal data which changes temporally and outputting the digital image signal data at a desired time in synchronization with the specific signal input from the analog signal processing means, A second temporary storage means for temporarily holding the control signal temporarily stored in the first temporary storage means and for outputting it at a desired time in synchronization with the specific signal input from the analog signal processing means, And the second temporary storage means And digital signal processing means for receiving a control signal and performing digital image signal processing and outputting it at a desired time in synchronization with a specific signal inputted from the analog signal processing means. 제1항에 있어서, 상기한 제1임시 기억수단과 상기한 제2임시 기억수단은 래치로 이루어지는 데이터 및 제어신호 전송회로.The data and control signal transmission circuit according to claim 1, wherein said first temporary storage means and said second temporary storage means comprise latches. 제1항에 있어서, 상기한 특정신호는 시스템 클록인 데이터 및 제어신호 전송회로.2. The circuit of claim 1, wherein the particular signal is a system clock. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960015916A 1996-05-14 1996-05-14 Circuit for transmitting data and control signal KR100189063B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960015916A KR100189063B1 (en) 1996-05-14 1996-05-14 Circuit for transmitting data and control signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960015916A KR100189063B1 (en) 1996-05-14 1996-05-14 Circuit for transmitting data and control signal

Publications (2)

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KR970078462A true KR970078462A (en) 1997-12-12
KR100189063B1 KR100189063B1 (en) 1999-06-01

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KR1019960015916A KR100189063B1 (en) 1996-05-14 1996-05-14 Circuit for transmitting data and control signal

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