KR970077592A - A lead frame for a lead-on chip to which a non-conductive adhesive tape is adhered to each of the inner leads, and a semiconductor chip package - Google Patents

A lead frame for a lead-on chip to which a non-conductive adhesive tape is adhered to each of the inner leads, and a semiconductor chip package Download PDF

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Publication number
KR970077592A
KR970077592A KR1019960017762A KR19960017762A KR970077592A KR 970077592 A KR970077592 A KR 970077592A KR 1019960017762 A KR1019960017762 A KR 1019960017762A KR 19960017762 A KR19960017762 A KR 19960017762A KR 970077592 A KR970077592 A KR 970077592A
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KR
South Korea
Prior art keywords
adhesive tape
lead
chip
leads
conductive adhesive
Prior art date
Application number
KR1019960017762A
Other languages
Korean (ko)
Inventor
이영민
오세용
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960017762A priority Critical patent/KR970077592A/en
Publication of KR970077592A publication Critical patent/KR970077592A/en

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Abstract

본 발명은 각각의 리드들에 비전도성 접착 테이프가 접착되어 있는 리드 온 칩용 리드 프레임 및 그를 이용한 반도체 칩 패키지에 관한 것으로, 레이져를 이용하여 리드들 사이의 비전도성 접착 테이프를 잘라냄으로써, 비전도성 접착 테이프와 칩 상면이 접촉하게 되는 면적이 상기 리드들 수준으로 줄게되고, 레이져를 사용하기 때문에 종래 기술에서 사용된 펀칭에 의한 비전도성 접착 테이프를 리드 수준으로 분할하는데 한계가 있는 문제점을 극복할 수 있으며, 정교한 작업이 가능하기 때문에 비전도성 접착 테이프의 손상을 줄일 수 있고, 비전도성 접착 테이프가 상기 칩의 상면에 점유하는 면적이 상기 리드 수준으로 줄기 때문에 비전도성 접착 테이프 자체의 흡습량을 줄이는 동시에 리드들간에 간격 또한 자유롭게 설계할 수 있어 패키지의 신뢰성을 개선할 수 있는 장점이 있다.The present invention relates to a lead frame for a lead-on chip having a non-conductive adhesive tape adhered to each lead, and a semiconductor chip package using the lead frame, and by cutting a non- The area where the tape and the upper surface of the chip are brought into contact with each other is reduced to the level of the leads, and since the laser is used, it is possible to overcome the problem that the nonconductive adhesive tape by punching, Conductive adhesive tape can be reduced, and the area occupied by the nonconductive adhesive tape on the upper surface of the chip is reduced to the lead level, so that the moisture absorption amount of the nonconductive adhesive tape itself is reduced, and at the same time, It is also possible to design the gap between packages There is an advantage that the reliability can be improved.

Description

내부리드 각각에 비전도성 접착 테이프가 접착된 리드 온 칩용 리드프레임 및 그를 이용한 반도체 칩 패키지A lead frame for a lead-on chip to which a non-conductive adhesive tape is adhered to each of the inner leads, and a semiconductor chip package

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제4도는 본 발명에 의한 리드프레임의 리드 각각에 테이프가 접착된 상태를 나타내는 평면도, 제5도는 본 발명에 의한 리드프레임을 이용한 리드 온 칩 패키지의 평면도, 제6도는 B-B'선 단면도.FIG. 5 is a plan view of a lead-on chip package using a lead frame according to the present invention; FIG. 6 is a sectional view taken along line B-B 'of FIG.

Claims (4)

리드 온 칩상에 형성된 본딩 패드들에 대응되고, 그 본딩패드들에 전기적으로 연결되는 리드들과; 상기 리드들을 상기 칩상에 접착하기 위한 비전도성 접착 테이프와; 타이바를 갖는 리드 온 칩용 리드프레임에 있어서, 상기 각각의 리드들에만 상기 비전도성 접착 테이프가 접착된 것을 특징으로 하는 리드 온 칩용 리드프레임.Leads corresponding to bonding pads formed on the lead-on chip and electrically connected to the bonding pads; A nonconductive adhesive tape for bonding the leads to the chip; A lead frame for a lead-on chip having a tie bar, wherein the non-conductive adhesive tape is bonded only to each of the leads. 제1항에 있어서, 상기 리드들 사이의 비전도성 접착 테이프가 레이져에 의해 잘려지는 것을 특징으로 하는 리드 온 칩용 리드프레임.The leadframe for a lead-on-chip according to claim 1, characterized in that the non-conductive adhesive tape between the leads is cut by a laser. 복수개의 본딩패드들이 상면에 형성된 칩과; 그 본딩패드들에 대응되고, 그 본딩패드들에 전기적으로 연결된 리드들과, 그 리드들을 상기 칩상면에 접착하기 위한 비전도성 접착 테이프와, 타이바를 갖는 리드 온 칩용 리드프레임; 상기 칩과 리드들과 타이바를 보호하기 위해 내재·봉지하기 위한 성형수지;를 포함하는 리드 온 칩 패키지에 있어서, 상기 각각의 리드들에만 상기 비전도성 접착 테이프가 접착된 것을 특징으로 하는 내부리드 각각의 비전도성 접착 테이프가 접착된 리드 온 칩용 리드프레임을 이용한 반도체 칩 패키지.A chip having a plurality of bonding pads formed on an upper surface thereof; A lead frame for a lead-on chip corresponding to the bonding pads and electrically connected to the bonding pads, a nonconductive adhesive tape for bonding the leads to the chip top surface, and a tie bar; And a molding resin for sealing and embedding to protect the chip, the leads and the tie bar, characterized in that the non-conductive adhesive tape is bonded only to each of the leads, Of a semiconductor chip package using a lead frame for a lead-on chip to which a nonconductive adhesive tape is adhered. 제3항에 있어서, 상기 리드들 사이의 비전도성 접착 테이프가 레이져에 의해 잘려지는 것을 특징으로 하는 내부리드 각각에 비전도성 접착 테이프가 접착된 리드 온 칩용 리드프레임을 이용한 반도체 칩 패키지.The semiconductor chip package according to claim 3, wherein the nonconductive adhesive tape between the leads is cut by a laser, wherein a nonconductive adhesive tape is adhered to each of the inner leads. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960017762A 1996-05-23 1996-05-23 A lead frame for a lead-on chip to which a non-conductive adhesive tape is adhered to each of the inner leads, and a semiconductor chip package KR970077592A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960017762A KR970077592A (en) 1996-05-23 1996-05-23 A lead frame for a lead-on chip to which a non-conductive adhesive tape is adhered to each of the inner leads, and a semiconductor chip package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960017762A KR970077592A (en) 1996-05-23 1996-05-23 A lead frame for a lead-on chip to which a non-conductive adhesive tape is adhered to each of the inner leads, and a semiconductor chip package

Publications (1)

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KR970077592A true KR970077592A (en) 1997-12-12

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Application Number Title Priority Date Filing Date
KR1019960017762A KR970077592A (en) 1996-05-23 1996-05-23 A lead frame for a lead-on chip to which a non-conductive adhesive tape is adhered to each of the inner leads, and a semiconductor chip package

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