KR970077547A - Separated die pad and semiconductor chip package and manufacturing method using same - Google Patents

Separated die pad and semiconductor chip package and manufacturing method using same Download PDF

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Publication number
KR970077547A
KR970077547A KR1019960019006A KR19960019006A KR970077547A KR 970077547 A KR970077547 A KR 970077547A KR 1019960019006 A KR1019960019006 A KR 1019960019006A KR 19960019006 A KR19960019006 A KR 19960019006A KR 970077547 A KR970077547 A KR 970077547A
Authority
KR
South Korea
Prior art keywords
die pad
chip
tie bars
semiconductor chip
bonding
Prior art date
Application number
KR1019960019006A
Other languages
Korean (ko)
Inventor
김재홍
성시찬
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960019006A priority Critical patent/KR970077547A/en
Publication of KR970077547A publication Critical patent/KR970077547A/en

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Abstract

본 발명은 분리된 다이패드를 이용한 반도체 칩 패키지 및 제조 방법에 관한 것으로, 연장된 타이바들을 갖는 패드리스 리드프레임은 시탬핑(stamping)법에 의해 제작되고, 분리된 다이패드의 하부면은 식각(etching)법에 의해 딤플(dimple)이 형성되고, 열압착 방법에 의해 다이패드와 연장된 타이바들이 접착됨으로써, 리드프레임의 제조에 있어서 대향 생산 및 저렴한 단가를 실현하는 동시에 다이패드의 평탄도를 유지할 수 있으며, 딤플의 형성이 용이한 장점이 있다.The present invention relates to a semiconductor chip package and a manufacturing method using a separate die pad, wherein a padless lead frame having extended tie bars is manufactured by a stamping method, and the bottom surface of the separated die pad is etched. Dimples are formed by the etching method, and the die pads and the extended tie bars are bonded by the thermocompression method, thereby achieving opposing production and low cost in the manufacture of the lead frame, and at the same time flatness of the die pads. It can be maintained, there is an advantage that the formation of the dimple is easy.

Description

분리된 다이패드 및 그를 이용한 반도체 칩 패키지 및 제조 방법Separated die pad and semiconductor chip package and manufacturing method using same

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명의 일실시예에 의한 연장된 타이바들에 칩이 접착된 다이패드가 접착되는 상태를 나타내는 평면도.3 is a plan view showing a state in which a die pad bonded to a chip is attached to extended tie bars according to an embodiment of the present invention.

Claims (5)

하부면에 딤플들이 형성된 다이패드와; 상기 다이패드 상면에 접착되어 있으며, 복수개의 본딩패드들을 갖는 칩과; 상기 다이패드 상면까지 연장되어 접착된 타이바들, 상기 본딩패드들에 대응되어 전기적으로 연결된 리드들을 갖는 패드리스 리드프레임과; 상기 칩과 리드들을 보호하기 위해 내재·봉지하는 성형수지;를 포함하는 분리된 다이패드를 이용한 반도체 칩 패키지.A die pad having dimples formed on a lower surface thereof; A chip bonded to an upper surface of the die pad and having a plurality of bonding pads; A padless lead frame having tie bars extended to the upper surface of the die pad and bonded to each other and electrically connected to the bonding pads; The semiconductor chip package using a separate die pad including a molded resin that is embedded and sealed to protect the chip and the leads. 연장된 타이바들을 갖는 패드리스 리드프레임이 구비되는 단계와; 다이패드의 하부면이 식각에 의해 딤플이 형성되는 단계와; 상기 다이패드의 상부면에 칩이 접착되는 단계와;상기 연장된 타이바들이 상기 다이패드 상면의 모서리 부분에 접착되는 단계와; 상기 칩이 상기 리드프레임의 리드들과 전기적으로 연결되는 단계와; 상기 칩과 다이패드를 보호하기 위해 성형수지에 의해 내재·봉지되는 단계;를 포함하는 것을 특징으로 하는 분리된 다이패드를 이용한 반도체 칩 패키지 제조 방법.A padless leadframe having elongated tie bars is provided; Forming dimples on the bottom surface of the die pad by etching; Bonding a chip to an upper surface of the die pad; bonding the extended tie bars to an edge of an upper surface of the die pad; The chip is electrically connected to the leads of the leadframe; Method of manufacturing a semiconductor chip package using a separate die pad, characterized in that it comprises a step of being embedded and sealed by a molding resin to protect the chip and the die pad. 제2항에 있어서, 상기 패드리스 리드프레임이 스탬핑법에 의해 제작되는 것을 특징으로 하는 분리된 다이패드를 이용한 반도체 칩 패키지 제조 방법.The method of claim 2, wherein the padless lead frame is manufactured by a stamping method. 제2항에 있어서, 상기 연장된 타이바들이 상기 다이패드 상부면에 열압착 공정에 의해 접착되는 것을 특징으로 하는 분리된 다이패드를 이용한 반도체 칩 패키지 제조 방법.The method of claim 2, wherein the extended tie bars are attached to the upper surface of the die pad by a thermocompression bonding process. 제4항에 있어서, 상기 열압착 공정과 칩을 접착하는 접착제를 경화시키는 공정이 동시에 진행되는 것을 특징으로 하는 분리된 다이패드를 이용한 반도체 칩 패키지 제조 방법.The method of claim 4, wherein the thermocompression step and the step of curing the adhesive for bonding the chip are performed at the same time. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960019006A 1996-05-31 1996-05-31 Separated die pad and semiconductor chip package and manufacturing method using same KR970077547A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960019006A KR970077547A (en) 1996-05-31 1996-05-31 Separated die pad and semiconductor chip package and manufacturing method using same

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KR1019960019006A KR970077547A (en) 1996-05-31 1996-05-31 Separated die pad and semiconductor chip package and manufacturing method using same

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100819794B1 (en) * 2002-04-02 2008-04-07 삼성테크윈 주식회사 Lead-frame and method for manufacturing semi-conductor package using such
KR100833938B1 (en) * 2002-03-28 2008-05-30 삼성테크윈 주식회사 Lead-frame for semiconductor package and method for manufacturing lead-frame

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100833938B1 (en) * 2002-03-28 2008-05-30 삼성테크윈 주식회사 Lead-frame for semiconductor package and method for manufacturing lead-frame
KR100819794B1 (en) * 2002-04-02 2008-04-07 삼성테크윈 주식회사 Lead-frame and method for manufacturing semi-conductor package using such

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