KR970077507A - 자기-정렬 resurf 영역을 가진 ldmos 장치 및 그 제조 방법 - Google Patents

자기-정렬 resurf 영역을 가진 ldmos 장치 및 그 제조 방법 Download PDF

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KR970077507A
KR970077507A KR1019970018481A KR19970018481A KR970077507A KR 970077507 A KR970077507 A KR 970077507A KR 1019970018481 A KR1019970018481 A KR 1019970018481A KR 19970018481 A KR19970018481 A KR 19970018481A KR 970077507 A KR970077507 A KR 970077507A
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semiconductor layer
edge
resurf
forming
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KR1019970018481A
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KR100468342B1 (ko
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덴 엠. 모셔
테일러 알. 에프랜드
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윌리엄 비. 캠플러
텍사스 인스트루먼츠 인코포레이티드
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
    • H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)

Abstract

RESURF LDMOS 트랜지스터 (64)는 LOCOS필드 산화 영역(44)에 자기-정렬된 RESURF 영역(42)을 포함한다. 자기-정렬은 기하학적 오정렬 및 공정 내성 변형과 연관된 저하를 제거함에 의해 안정된 항복 전압(VBdss)를 생성한다.

Description

자기-정렬 RESURF 영역을 가진 LDMOS 장치 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 제조 동안의 연속 공정에서의 본 발명에 따른 RESURF LDMOS 트랜지스터를 도시한 횡단면도.

Claims (7)

  1. 제1전도형의 반도체층, 상기 반도체층내에 형성된 제2도전형이 RESURF 영역, 자신과 자기-정렬(self-aligned)관계인 RESURF 영역의 일면에 형성된 LOCOS필드 산화 영역, 상기 반도체층내에 형성된 제1전도형의 웰, 상기 웰내에 형성된 제2전도형의 소스 영역과 상기 소스 영역의 제1에지와 상기 RESURF 영역의 제1에지 사이의 웰내에 한정되는 채널 영역, 상기 RESURF 영역의 제2에지에 인접한 상기 반도체층내에 형성된 제2전도형의 드레인 영역, 및 상기 채널 영역위에 형성되고 상기 채널 영역과 절연된 전도성 게이트를 포함하는 것을 특징으로 하는 트랜지스터.
  2. 제1항에 있어서, 상기 반도체층이 제1전도형의 기판상에 형성된 에피텍셜층(epitaxioal layer)인 것을 특징으로 하는 트랜지스터.
  3. 제1항에 있어서, 상기 드레인 영역은 상기 LOCOS 필드 산화 영역의 에지와 자기-정렬되는 에지를 가지는 것을 특징으로 하는 트랜지스터.
  4. 제1항에 있어서, 상기 소스 영역의 제2에지에 인접한 웰내에 형성되는 제1전도형의 백게이트(backgate)접촉부를 더 포함하는 것을 특징으로 하는 트랜지스터.
  5. 제1항에 있어서, 상기 제1전도형은 P이고 상기 제2전도형은 N인 것을 특징으로 하는 트랜지스터.
  6. 제1전도형의 반도체층을 형성하는 단계, 상기 반도체층상에, 상기 반도체층의 제1영역을 노출시키는 개구부(opening)를 가지는 마스크를 형성하는 단계, RESURF 영역을 형성하도록 상기 반도체층의 상기 제1영역내에 마스크의 개구부를 통해 제2전도형의 불순물을 주입하는 단계, RESURF 영역이 자신과 자기-정렬되는 LOCOS필드 산화 영역을 마스크의 개구부에 의해 한정된 제1영역의 일면에서 성장시키는 단계, LOCOS필드 산화 영역의 부분위로 연장되는 전도성 게이트를 상기 반도체층의 일면 위에 형성시키고 이로부터 절연되는 단계, RESURF 영역과 인접한 반도체층내에 제1전도형의 웰을 형성하는 단계, 상기 웰내에 제2전도형의 소스영역을 형성하는 단계로서, 상기 전도성 게이트는 상기 소스 영역의 제1에지와 상기 RESURF 영역의 제1에지사이의 웰 내에 한정되는 채널 영역위로 연장하는 단계, 및 RESURF 영역의 제2에지에 인접한 반도체층내에 제2전도형의 드레인 영역을 형성하는 단계를 포함하는 것을 특징으로 하는 트랜지스터 제조 방법.
  7. 제6항에 있어서, 상기 마스크를 형성하는 단계는 상기 반도체층위에 질화물층을 피착시키는 단계, 및 상기 제1영역을 노출시키는 개구부를 형성시키도록 상기 질화물층을 패터닝하고 에칭하는 단계를 포함하는 것을 특징으로 하는 트랜지스터 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019970018481A 1996-05-15 1997-05-13 자기-정렬resurf영역을가진ldmos장치및그제조방법 KR100468342B1 (ko)

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EP0837509A1 (en) 1998-04-22
TW345693B (en) 1998-11-21
JPH1050997A (ja) 1998-02-20
KR100468342B1 (ko) 2005-06-02
US6483149B1 (en) 2002-11-19

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