KR970072097A - Method for forming bonding pads of semiconductor devices - Google Patents

Method for forming bonding pads of semiconductor devices Download PDF

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Publication number
KR970072097A
KR970072097A KR1019960012727A KR19960012727A KR970072097A KR 970072097 A KR970072097 A KR 970072097A KR 1019960012727 A KR1019960012727 A KR 1019960012727A KR 19960012727 A KR19960012727 A KR 19960012727A KR 970072097 A KR970072097 A KR 970072097A
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KR
South Korea
Prior art keywords
film
polyimide film
forming
predetermined
metal wiring
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Application number
KR1019960012727A
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Korean (ko)
Inventor
박상훈
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960012727A priority Critical patent/KR970072097A/en
Publication of KR970072097A publication Critical patent/KR970072097A/en

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Abstract

본 발명은 반도체 소자의 제조공정에서 와이어 본딩을 위한 본딩 패드 형성방법을 개시한다. 이 방법은 소정의 단위 셀 및 배선 등이 형성된 반도체 기판 상부에 소정의 층간 절연용 산화막이 형성된 반도체 소자에 있어서, 산화막 위에 소정 두께의 본딩 패드용 금속배선을 형성하는 단계; 금속배선 위에 보호막을 형성하는 단계; 보호막 위에 낮은 점도를 가지면서 순차적으로 점도가 높아지는 다층 폴리이미드막을 순차적으로 소정 두께로 도포하는 단계; 도포된 폴리이미드막을 소프트 베이크하는 단계; 금속배선 상부의 다층 폴리이미드막의 소정 부분을 노광 및 현상공정을 통하여 제거하는 단계; 제거되고 남은 폴리이미드막을 큐어링하는 단계; 노출된 보호막을 제거하는 단계를 포함하는 것을 특징으로 한다.The present invention discloses a method of forming a bonding pad for wire bonding in a manufacturing process of a semiconductor device. This method comprises the steps of: forming a predetermined interlayer insulating oxide film on a semiconductor substrate on which predetermined unit cells and wirings are formed; forming a metal wiring for a bonding pad having a predetermined thickness on the oxide film; Forming a protective film on the metal wiring; Sequentially coating a multi-layered polyimide film having a low viscosity on the protective film and having a high viscosity sequentially, to a predetermined thickness; Soft baking the applied polyimide film; Removing a predetermined portion of the multilayer polyimide film on the metal wiring through an exposure and development process; Curing the removed and remaining polyimide film; And removing the exposed protective film.

Description

반도체 소자의 본딩 패드 형성방법Method for forming bonding pads of semiconductor devices

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2도는 본 발명의 실시예에 따른 것으로서, 본딩 패드를 형성하기 위한 과정을 보여주는 공정 흐름도.FIG. 2 is a process flow diagram illustrating a process for forming a bonding pad according to an embodiment of the present invention. FIG.

Claims (7)

소정의 단위 셀 및 배선등이 형성된 반도체 기판 상부에 소정의 층간 절연용 산화막이 형성된 반도체 소자에 있어서, 산화막 위에 소정 두께의 본딩 패드용 금속배선을 형성하는 단계; 상기 금속배선 위에 보호막을 형성하는 단계; 보호막 위에 낮은 점도를 가지면서 순차적으로 점도가 높아지는 다층 폴리이미드막을 순차적으로 소정 두께로 도포하는 단계; 도포된 폴리이미드막을 소프트 베이크하는 단계; 금속배선 상부의 다층 폴리이미드막의 소정 부분을 노광 및 현상공정을 통하여 제거하는 단계; 제거되고 남은 폴리이미드막을 큐어링하는 단계; 노출된 보호막을 제거하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 본딩패드 형성방법.A method of manufacturing a semiconductor device, comprising: forming a predetermined interlayer insulating oxide film on a semiconductor substrate on which predetermined unit cells and wirings are formed, the method comprising: forming a metal wiring for a bonding pad having a predetermined thickness on an oxide film; Forming a protective film on the metal wiring; Sequentially coating a multi-layered polyimide film having a low viscosity on the protective film and having a high viscosity sequentially, to a predetermined thickness; Soft baking the applied polyimide film; Removing a predetermined portion of the multilayer polyimide film on the metal wiring through an exposure and development process; Curing the removed and remaining polyimide film; And removing the exposed protective film. ≪ Desc / Clms Page number 20 > 제1항에 있어서, 상기 다층 폴리이미드막은 하부의 제1폴리이미드막과 상부의 제2폴리이미드막으로 구성되는 것을 특징으로 하는 반도체 소자의 본딩패드 형성방법.The method of claim 1, wherein the multi-layer polyimide film comprises a first polyimide film at a lower portion and a second polyimide film at an upper portion. 제1항에 있어서, 상기 보호막은 하부의 산화막과, 사익 산화막 상부에 질화막으로 이루어지는 것을 특징으로 하는 반도체 소자의 본딩패드 형성방법.The method according to claim 1, wherein the protective film comprises a lower oxide film and a nitride film on the upper surface of the oxide film. 제3항에 있어서, 상기 산화막은 1,500~2,000Å 범위로, 상기 질화ㅁ가은 4,000~6,000Å 범위로 각각 형성하는 것을 특징으로 하는 반도체 소자의 본딩패드 형성방법.4. The method of claim 3, wherein the oxide film is formed in a range of 1,500 to 2,000 angstroms and the nitride film is formed in a range of 4,000 to 6,000 angstroms. 제2항에 있어서, 상기 제1폴리이미드막의 도포두께는 5~15㎛ 범위인 것을 특징으로 하는 반도체 소자의 본딩패드 형성방법.3. The method according to claim 2, wherein the thickness of the first polyimide film is in the range of 5 to 15 mu m. 제2항에 있어서, 상기 제2폴리이미드막의 도포 두께는 15~25㎛ 범위인 것을 특징으로 하는 반도체 소자의 본딩패드 형성방법.The method according to claim 2, wherein the thickness of the second polyimide film is in the range of 15 to 25 占 퐉. 제1항에 있어서, 상기 소프트 베이크는 70~100℃ 범위에서 행하는 것을 특징으로 하는 반도체 소자의 본딩패드 형성방법.The method according to claim 1, wherein the soft bake is performed in a temperature range of 70 to 100 캜. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960012727A 1996-04-24 1996-04-24 Method for forming bonding pads of semiconductor devices KR970072097A (en)

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KR1019960012727A KR970072097A (en) 1996-04-24 1996-04-24 Method for forming bonding pads of semiconductor devices

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KR1019960012727A KR970072097A (en) 1996-04-24 1996-04-24 Method for forming bonding pads of semiconductor devices

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100787267B1 (en) * 2004-08-27 2007-12-21 학교법인 동국대학교 passivation method of using photoactive polyimide
KR100861293B1 (en) * 2002-12-09 2008-10-01 주식회사 하이닉스반도체 Method for fabricating photoresist pattern

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100861293B1 (en) * 2002-12-09 2008-10-01 주식회사 하이닉스반도체 Method for fabricating photoresist pattern
KR100787267B1 (en) * 2004-08-27 2007-12-21 학교법인 동국대학교 passivation method of using photoactive polyimide

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