KR970063418A - Reticle for semiconductor device fabrication - Google Patents

Reticle for semiconductor device fabrication Download PDF

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Publication number
KR970063418A
KR970063418A KR1019960004784A KR19960004784A KR970063418A KR 970063418 A KR970063418 A KR 970063418A KR 1019960004784 A KR1019960004784 A KR 1019960004784A KR 19960004784 A KR19960004784 A KR 19960004784A KR 970063418 A KR970063418 A KR 970063418A
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KR
South Korea
Prior art keywords
semiconductor device
reticle
patterns
manufacturing
device fabrication
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Application number
KR1019960004784A
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Korean (ko)
Inventor
권원택
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960004784A priority Critical patent/KR970063418A/en
Publication of KR970063418A publication Critical patent/KR970063418A/en

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  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

본 발명은 반도체 소자 제조용 래티클에 관한 것으로, 웨이퍼의 오정렬로 인해 발생되는 패턴의 균일도 저하를 방지 하기 위하여 노광 필드부의 외측 각 모서리 부분에 크기가 서로 다른 다수의 패턴이 형성된 모니터링부를 형성하므로써 웨이퍼의 수평도 및 촛점 거리를 정확하고 빠르게 조절할 수 있으며, 또한 패턴의 균일도 향상으로 소자의 수율이 증대될 수 있도록 한 반도체 소자 제조용 래티클에 관한 것이다.The present invention relates to a reticle for manufacturing a semiconductor device, in which a monitoring part having a plurality of patterns having different sizes is formed at an outer corner of an exposure field part in order to prevent a uniformity of patterns generated due to misalignment of wafers, To a reticle for manufacturing a semiconductor device capable of precisely and quickly adjusting a horizontal and a focal length, and increasing the yield of a device by improving pattern uniformity.

Description

반도체 소자 제조용 레티클Reticle for semiconductor device fabrication

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제1도는 본 발명에 따른 반도체 소자 제조용 래티클의 평면도.FIG. 1 is a plan view of a reticle for manufacturing a semiconductor device according to the present invention. FIG.

Claims (5)

반도체 소자 제조용 래티클에 있어서, 선택적으로 크롬이 코팅될 수 있는 기판과, 회로 패턴이 형성되며, 웨이퍼의 노광될 다이와 일치되도록 상기 기판의 중앙부에 형성된 노광 필드부와, 상기 노광 필드부 외측의 네 모서리 부분에 형성되며, 크기가 서로 다른 다수의 패턴이 형성된 모니터링부로 이루어지는 것을 특징으로 하는 반도체 소자 제조용 래티클.1. A reticle for fabricating a semiconductor device, comprising: a substrate on which chromium can be selectively coated; an exposure field portion formed in a central portion of the substrate so that a circuit pattern is formed and coincided with a die to be exposed on the wafer; And a monitoring portion formed at an edge portion and having a plurality of patterns having different sizes from each other. 제1항에 있어서, 상기 모니터링부에 형성된 다수의 패턴은 바 패턴인 것을 특징으로 하는 반도체 소자 제조용 래티클.The reticle for manufacturing a semiconductor device according to claim 1, wherein the plurality of patterns formed on the monitoring unit are bar patterns. 제2항에 있어서, 상기 바 패턴은 넓이가 0.3 내지 1.0㎛의 범위내에서 일정한 크기차를 갖도록 형성되는 것을 특징으로 하는 반도체 소자 제조용 래티클.3. The reticule for manufacturing a semiconductor device according to claim 2, wherein the bar pattern is formed to have a constant size difference within a range of 0.3 to 1.0 mu m. 제1항에 있어서, 상기 모니터링부에 형성된 다수의 패턴은 콘택 홀 패턴인 것을 특징으로 하는 반도체 소자 제조용 래티클.The reticle for manufacturing a semiconductor device according to claim 1, wherein the plurality of patterns formed on the monitoring unit are contact hole patterns. 제4항에 있어서, 상기 콘택 홀 패턴은 직경이 0.3 내지 1.0㎛의 범위내에서 일정한 크기차를 갖도록 형성되는 것을 특징으로 하는 반도체 소자 제조용 래티클.5. The reticule for manufacturing a semiconductor device according to claim 4, wherein the contact hole pattern is formed to have a constant size difference within a range of 0.3 to 1.0 mu m in diameter. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960004784A 1996-02-27 1996-02-27 Reticle for semiconductor device fabrication KR970063418A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960004784A KR970063418A (en) 1996-02-27 1996-02-27 Reticle for semiconductor device fabrication

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960004784A KR970063418A (en) 1996-02-27 1996-02-27 Reticle for semiconductor device fabrication

Publications (1)

Publication Number Publication Date
KR970063418A true KR970063418A (en) 1997-09-12

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Application Number Title Priority Date Filing Date
KR1019960004784A KR970063418A (en) 1996-02-27 1996-02-27 Reticle for semiconductor device fabrication

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KR (1) KR970063418A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100492908B1 (en) * 1997-12-27 2005-08-25 주식회사 하이닉스반도체 Auto focus / flatness adjustment method considering lens aberration effect

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100492908B1 (en) * 1997-12-27 2005-08-25 주식회사 하이닉스반도체 Auto focus / flatness adjustment method considering lens aberration effect

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