KR970054399A

KR970054399A - Most transistor manufacturing method

Info

Publication number: KR970054399A
Application number: KR1019950064437A
Authority: KR
Inventors: 김천수
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1995-12-29
Filing date: 1995-12-29
Publication date: 1997-07-31

Abstract

본 발명은 모스 트랜지스터 제조 방법에 있어서, 반도체 기판 상에 게이트 절연막과 게이트 전극을 패터닝하는 단계; 상기 게이트 전극 측벽에 불순물이 도핑된 절연막을 사용하여 스페이서를 형성하는 단계; 고농도 불순물 이온주입을 실시하는 단계; 열처리 공정을 통해 상기 불순물이 도핑된 절연막의 불순물을 상기 불순물이 도핑된 절연막과 접하고 있는 반도체 기판에 확산시키는 단계를 포함하는 것을 특징으로 하는 모스트랜지스터 제조 방법에 관한 것으로, SPD(solid phase diffusion)방법으로 소오스/드레인 접합을 형성하여, 높은 농도의 낮은 접합을 형성할 수 있으므로, 숏 채널 효과를 억제하고, 소자의 고집적화를 향상시키는 효과가 있다.A method of manufacturing a MOS transistor, the method comprising: patterning a gate insulating film and a gate electrode on a semiconductor substrate; Forming a spacer using an insulating layer doped with impurities on the sidewall of the gate electrode; Performing a high concentration of impurity ion implantation; A method of manufacturing a MOS transistor, comprising: diffusing an impurity of an insulating layer doped with an impurity to a semiconductor substrate in contact with the insulating layer doped with an impurity through a heat treatment process. As a result, a source / drain junction can be formed to form a low junction with a high concentration, so that the short channel effect can be suppressed and the integration of the device can be improved.

Description

MOS transistor manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A도 내지 제2D도는 본 발명의 일실시예에 따른 모스트랜지스터 제조 공정도.2A through 2D are MOS transistor manufacturing process diagrams according to an embodiment of the present invention.

Claims

A MOS transistor manufacturing method comprising: patterning a gate insulating film and a gate electrode on a semiconductor substrate; Forming a spacer using an insulating layer doped with impurities on the sidewall of the gate electrode; Performing a high concentration of impurity ion implantation; And diffusing an impurity of the insulating film doped with the impurity into a semiconductor substrate in contact with the insulating film doped with the impurity through a heat treatment process.

The method of claim 1, wherein the heat treatment process is a metal transistor heat treatment (RTA) for MOS transistor manufacturing method characterized in that performed for 10 seconds at 1050 ℃.

The method of claim 1, wherein the doped insulating film is a BSG film.

※ Note: The disclosure is based on the initial application.