KR970003940A - Transistor manufacturing method of semiconductor device - Google Patents

Transistor manufacturing method of semiconductor device Download PDF

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Publication number
KR970003940A
KR970003940A KR1019950018536A KR19950018536A KR970003940A KR 970003940 A KR970003940 A KR 970003940A KR 1019950018536 A KR1019950018536 A KR 1019950018536A KR 19950018536 A KR19950018536 A KR 19950018536A KR 970003940 A KR970003940 A KR 970003940A
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KR
South Korea
Prior art keywords
semiconductor device
forming
transistor
silicon substrate
manufacturing
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Application number
KR1019950018536A
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Korean (ko)
Inventor
송택근
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950018536A priority Critical patent/KR970003940A/en
Publication of KR970003940A publication Critical patent/KR970003940A/en

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Abstract

본 발명은 반도체 소자의 트랜지스터 제조방법에 관한 것으로, 쇼트 채널 효과(Short Channel Effect)를 억제시키기 위하여 이중 구조의 LDD(Lightly Dopped Drain) 영역을 갖는 접합영역을 형성하므로써 소자의 전기적특성을 향상시킬 수 있도록 한 반도체 소자의 트랜지스터 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a transistor of a semiconductor device. In order to suppress short channel effects, the electrical properties of the device can be improved by forming a junction region having a double structured lightly doped drain (LDD) region. The present invention relates to a transistor manufacturing method of a semiconductor device.

Description

반도체 소자의 트랜지스터 제조방법Transistor manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2D도는 본 발명에 따른 반도체 소자의 트랜지스터 제조방법을 설명하기 위한 소자의 단면도.2D is a cross-sectional view of a device for explaining a transistor manufacturing method of a semiconductor device according to the present invention.

Claims (3)

반도체 소자의 트랜지스터 제조방법에 있어서, 웰이 형성된 실리콘기판의 필드영역에 필드산화막을 형성한 후 전체 상부면에 게이트산화막 및 폴리실리콘층을 순차적으로 형성하고 게이트 전극용 마스크를 이용한 사진 및 식각공정으로 상기 폴리실리콘층 및 게이트산화막을 순차적으로 패터닝하여 게이트전극을 형성하는 단계와, 상기 단계로부터 상기 게이트전극 양측부의 노출된 실리콘기판에 저농도의 불순물이온을 주입하여 제LDD영역을 형성하는 단계와, 상기 단계로부터 상기 게이트전극의 양측벽에 제1산화막 스페이서를 형성한 후 제1열처리공정을 실시하고 노출된 실리콘기판에 저농도의 불순물이온을 주입하여 제2LDD영역을 형성하는 단계와, 상기 단계로부터 상기 제1산화막 스페이서의 외측벽에 제2산화막 스페이서를 형성한 후 제3열처리공정을 실시하고 노출된 실리콘기판에 고농도의 불순물이온을 주입하고 제4열처리공정을 진행하여 접합영역의 형성을 완료하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조방법.In the method of manufacturing a transistor of a semiconductor device, after forming a field oxide film in a field region of a silicon substrate on which a well is formed, a gate oxide film and a polysilicon layer are sequentially formed on the entire upper surface, and a photo and etching process is performed using a mask for a gate electrode. Patterning the polysilicon layer and the gate oxide layer sequentially to form a gate electrode, and implanting low concentration of impurity ions into the exposed silicon substrate at both sides of the gate electrode from the step to form a LDD region; Forming a second LDD region by forming a first oxide spacer on both sidewalls of the gate electrode, performing a first heat treatment process, and implanting a low concentration of impurity ions into the exposed silicon substrate; Third row after forming the second oxide film spacer on the outer wall of the first oxide film spacer Embodiment the process and transistor manufacturing method of the semiconductor device, characterized in that injection of a high concentration of impurity ions in the exposed silicon substrate and the process proceeds to the fourth heat processing step comprising the step of completing the formation of the joint region. 제1항에 있어서, 상기 제2LDD영역의 불순물 농도는 상기 제1LDD영역의 불순물 농도보다 높은 것을 특징으로 하는 반도체 소자의 트랜지스터 제조방법.The method of claim 1, wherein the impurity concentration of the second LDD region is higher than that of the first LDD region. 제1항에 있어서, 상기 제2열처리공정이 생략되는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조방법.The method of manufacturing a transistor of a semiconductor device according to claim 1, wherein said second heat treatment step is omitted. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950018536A 1995-06-30 1995-06-30 Transistor manufacturing method of semiconductor device KR970003940A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950018536A KR970003940A (en) 1995-06-30 1995-06-30 Transistor manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950018536A KR970003940A (en) 1995-06-30 1995-06-30 Transistor manufacturing method of semiconductor device

Publications (1)

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KR970003940A true KR970003940A (en) 1997-01-29

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KR1019950018536A KR970003940A (en) 1995-06-30 1995-06-30 Transistor manufacturing method of semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100873814B1 (en) * 2002-07-05 2008-12-11 매그나칩 반도체 유한회사 Semiconductor device having double lightly doped drain and method for fabricating ths same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100873814B1 (en) * 2002-07-05 2008-12-11 매그나칩 반도체 유한회사 Semiconductor device having double lightly doped drain and method for fabricating ths same

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