KR960009066A - Transistor manufacturing method of semiconductor device - Google Patents

Transistor manufacturing method of semiconductor device Download PDF

Info

Publication number
KR960009066A
KR960009066A KR1019940019608A KR19940019608A KR960009066A KR 960009066 A KR960009066 A KR 960009066A KR 1019940019608 A KR1019940019608 A KR 1019940019608A KR 19940019608 A KR19940019608 A KR 19940019608A KR 960009066 A KR960009066 A KR 960009066A
Authority
KR
South Korea
Prior art keywords
oxide film
semiconductor device
concentration impurity
gate electrode
transistor
Prior art date
Application number
KR1019940019608A
Other languages
Korean (ko)
Inventor
서난경
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940019608A priority Critical patent/KR960009066A/en
Publication of KR960009066A publication Critical patent/KR960009066A/en

Links

Abstract

본 발명은 반도체 소자의 트랜지스터 제조방법에 관한 것으로, 소자의 크기 감소로 인한 단 채널 효과 및 소오스/드레인 영역에서의 측면 확산으로 인한 펀치 쓰루우 현상의 발생을 방지하기 위하여 실리콘 기판의 게이트(Gate) 전극이 형성될 부분에 LOCOS 산화막을 형성한 후 저농도 불순물영역을 형성하고 상기 LOCOS산화막을 제거한 다음 리세스(Recess) 구조의 게이트 전극을 형성하여 소오스(Source) 및 드레인(Drain) 영역을 게이트 전극보다 높게 형성시키므로써 소자의 전기적 특성을 향상시킬 수 있도록 한 반도체 소자의 트랜지스터 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a transistor of a semiconductor device, and in order to prevent the occurrence of a punch through phenomenon due to short channel effects and side diffusion in a source / drain region due to a reduction in the size of the device, a gate of a silicon substrate. After forming the LOCOS oxide film on the part where the electrode is to be formed, a low concentration impurity region is formed, the LOCOS oxide film is removed, and a gate electrode having a recess structure is formed so that the source and drain regions are formed more than the gate electrode. The present invention relates to a method for manufacturing a transistor of a semiconductor device that can be formed to increase the electrical characteristics of the device.

Description

반도체 소자의 트랜지스터 제조방법Transistor manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1a 내지 제1f도는 본 발명에 따른 반도체 소자의 트랜지스터 제조방법을 설명하기 위한 소자의 단면도.1A to 1F are cross-sectional views of a device for explaining a transistor manufacturing method of a semiconductor device according to the present invention.

Claims (3)

반도체 소자의 트랜지스터 제조방법에 있어서, 실리콘 기판(1)의 게이트 전극이 형성될 부분에 LOCOS방법으로 LOSCO 산화막(4)을 형성시키는 단계와, 상기 단계로부터 저농도 불순물 이온을 주입시켜 저농도불순물 영역(5)을 형성시키는 단계와, 상기 단계로부티 상기 LOCOS 산화막(4)을 제거시키고 전체 상부면에 게이트 산화막(6) 및 폴리실리콘층(7)을 순차적으로 형성시킨 후 패터닝하여 게이트 전극(9)을 형성시키는 단계와, 상기 단계로부터 전체 상부면에 고농도 불순물 이온을 주입시켜 소오스 및 드레인 영역(8)을 형성시키는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조방법.In the transistor manufacturing method of the semiconductor device, the LOSCO oxide film 4 is formed by the LOCOS method in the portion where the gate electrode of the silicon substrate 1 is to be formed, and the low concentration impurity region is implanted by injecting low concentration impurity ions therefrom. ) And the step of removing the LOCOS oxide film 4 and sequentially forming the gate oxide film 6 and the polysilicon layer 7 on the entire upper surface thereof, and then patterning the gate electrode 9. And forming a source and a drain region (8) by implanting high concentration impurity ions into the entire upper surface from the step. 제1항에 있어서, 상기 저농도 불순물 이온 주입시 상기 LOCOS 산화막(4)을 자기 정렬 마스크로 이용하는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조방법.The method of manufacturing a transistor of a semiconductor device according to claim 1, wherein said LOCOS oxide film (4) is used as a self-alignment mask during said low concentration impurity ion implantation. 제1항에 있어서, 상기 게이트 전극(9)은 리세스 구조로 형성되는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조방법.A method according to claim 1, wherein the gate electrode (9) is formed in a recess structure. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940019608A 1994-08-09 1994-08-09 Transistor manufacturing method of semiconductor device KR960009066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940019608A KR960009066A (en) 1994-08-09 1994-08-09 Transistor manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940019608A KR960009066A (en) 1994-08-09 1994-08-09 Transistor manufacturing method of semiconductor device

Publications (1)

Publication Number Publication Date
KR960009066A true KR960009066A (en) 1996-03-22

Family

ID=66697764

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940019608A KR960009066A (en) 1994-08-09 1994-08-09 Transistor manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR960009066A (en)

Similar Documents

Publication Publication Date Title
KR970018684A (en) LDD structure MOS transistor manufacturing method
KR970003688A (en) Transistor manufacturing method of semiconductor device
KR950021786A (en) MOSFET and manufacturing method
KR960009066A (en) Transistor manufacturing method of semiconductor device
KR100252842B1 (en) Semiconductor device and its manufacture method
KR970004069A (en) Transistor manufacturing method and structure of semiconductor device
KR960019768A (en) Transistor Manufacturing Method
KR940016927A (en) Method of manufacturing MOS-FET with vertical channel using trench structure
KR960009216A (en) Semiconductor device and manufacturing method
KR0156103B1 (en) Fabrication method of semiconductor device
KR100192508B1 (en) Method of manufacturing mesfet
KR950012717A (en) Semiconductor device manufacturing method
KR950026026A (en) Transistor manufacturing method
KR980005893A (en) Method of manufacturing transistor of semiconductor device
KR970003940A (en) Transistor manufacturing method of semiconductor device
KR940016929A (en) MOS transistor manufacturing method
KR960026558A (en) Device Separating Method of Semiconductor Device
KR19990006027A (en) Manufacturing method of semiconductor device
KR960005891A (en) Transistor manufacturing method of semiconductor device
KR940016888A (en) Transistor Formation Method
KR950021745A (en) Manufacturing method of MOS type field effect transistor (MOSFET) of semiconductor device
KR960015813A (en) MOSFET formation method
KR19980035936A (en) Manufacturing method of self-aligned mesfet (MESFET)
KR940010387A (en) Semiconductor device manufacturing method
KR970003533A (en) Manufacturing method of semiconductor device

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination