KR970054223A - Method for forming charge storage electrode of semiconductor device - Google Patents

Method for forming charge storage electrode of semiconductor device Download PDF

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Publication number
KR970054223A
KR970054223A KR1019950050934A KR19950050934A KR970054223A KR 970054223 A KR970054223 A KR 970054223A KR 1019950050934 A KR1019950050934 A KR 1019950050934A KR 19950050934 A KR19950050934 A KR 19950050934A KR 970054223 A KR970054223 A KR 970054223A
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KR
South Korea
Prior art keywords
forming
polysilicon film
doped polysilicon
charge storage
storage electrode
Prior art date
Application number
KR1019950050934A
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Korean (ko)
Inventor
전영호
여태정
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950050934A priority Critical patent/KR970054223A/en
Publication of KR970054223A publication Critical patent/KR970054223A/en

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  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 도핑된 폴리실리콘막을 형성하는 제1담계; 상기 도핑된 폴리실리콘막 표면에 군데군데 다수의 물방울 형성하는 제2단계; 상기 물방울이 맺힌 부위의 폴리실리콘막을 산화시켜 산화막을 형성하는 제3단계; 상기 산화막을 마스크로하여 상기 도핑된 폴리실리콘막을 소정 깊이 식각하여 다수의 돌출부를 형성하는 제4단계; 및 상기 산화막을 제거하는 제5단계를 포함하는 것을 특징으로 하는 전하저장전극 형성 방법에 관한 것으로, 반도체 메모리 소자의 셀당 필요한 캐패시터 용량을 확보할 수 있도록 표면적이 극대화된 다수의 돌출부를 갖는 전하저장전극을 재현성이 용이한 공정으로 형성함으로써, 소자의 제조 수율 및 제조 단가의 절감을 가져오는 효과가 있다.The present invention is a first support system for forming a doped polysilicon film; A second step of forming a plurality of droplets on the surface of the doped polysilicon layer; A third step of forming an oxide film by oxidizing the polysilicon film of the water droplets; A fourth step of forming a plurality of protrusions by etching the doped polysilicon film by a predetermined depth using the oxide film as a mask; And a fifth step of removing the oxide film, wherein the charge storage electrode has a plurality of protrusions having a surface area maximized to ensure a required capacitor capacity per cell of a semiconductor memory device. By forming the process in an easily reproducible process, there is an effect of reducing the manufacturing yield and manufacturing cost of the device.

Description

반도체 소자의 전하저장전극 형성 방법Method for forming charge storage electrode of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1D도는 본 발명의 일실시예에 따른 전하저장전극 형성 공정도.1A to 1D are process charts for forming a charge storage electrode according to an embodiment of the present invention.

Claims (4)

반도체 소자의 전하저장전극 형성 방법에 있어서; 도핑된 폴리실리콘막을 형성하는 제1단계; 상기 도핑된 폴리실리콘막 표면에 군데군데 다수의 물방울 형성하는 제2단계; 상기 물방울이 맺힌 부위의 폴리실리콘막을 산화시켜 산화막을 형성하는 제3단계; 상기 산화막을 마스코로하여 상기 도핑된 폴리실리콘막을 소정 깊이 식각하여 다수의 돌출부를 형성하는 제4단계; 및 상기 산화막을 제거하는 제5단계를 포함하는 것을 특징으로 하는 전하저장전극 형성 방법.A method for forming a charge storage electrode of a semiconductor device; A first step of forming a doped polysilicon film; A second step of forming a plurality of droplets on the surface of the doped polysilicon layer; A third step of forming an oxide film by oxidizing the polysilicon film of the water droplets; A fourth step of forming a plurality of protrusions by etching the doped polysilicon layer by a predetermined depth using the oxide layer as a masco; And a fifth step of removing the oxide film. 제1항에 있어서; 상기 돌출부가 형성된 폴리실리콘막 상에 반구형 폴리실리콘막을 형성하는 단계를 더 포함하는 것을 특징으로 하는 전하저장전극 형성 방법.The method of claim 1; And forming a hemispherical polysilicon film on the polysilicon film having the protrusion formed thereon. 제1항 또는 제2항에 있어서; 상기 제2단계는 HF 증기로 상기 도핑된 폴리실리콘막의 표면을 세정한 후 세정된 폴리실리콘막의 표면을 물 증기로 처리 하므로써 이루어지는 것을 특징으로 하는 전하저장전극 형성 방법.The method of claim 1 or 2; And the second step is performed by cleaning the surface of the doped polysilicon film with HF vapor and then treating the surface of the cleaned polysilicon film with water vapor. 제1항 또는 제2항에 있어서; 상기 제3단계는 대기중에서 핫 플레이트 베이크 (hot plate bake)를 실시하여 이루어지는 것을 특징으로 하는 전하저장전극 형성 방법.The method of claim 1 or 2; The third step is a method of forming a charge storage electrode, characterized in that by performing a hot plate bake (hot plate bake) in the atmosphere. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950050934A 1995-12-16 1995-12-16 Method for forming charge storage electrode of semiconductor device KR970054223A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950050934A KR970054223A (en) 1995-12-16 1995-12-16 Method for forming charge storage electrode of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950050934A KR970054223A (en) 1995-12-16 1995-12-16 Method for forming charge storage electrode of semiconductor device

Publications (1)

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KR970054223A true KR970054223A (en) 1997-07-31

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KR1019950050934A KR970054223A (en) 1995-12-16 1995-12-16 Method for forming charge storage electrode of semiconductor device

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100274347B1 (en) * 1997-12-31 2000-12-15 김영환 Method of forming a storage node in a semiconductor device
KR100745065B1 (en) * 2004-12-27 2007-08-01 주식회사 하이닉스반도체 Method for removing a growth particle on Phase Shift Mask
KR100762229B1 (en) * 2001-12-27 2007-10-01 주식회사 하이닉스반도체 Method for fabricating a photomask

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100274347B1 (en) * 1997-12-31 2000-12-15 김영환 Method of forming a storage node in a semiconductor device
KR100762229B1 (en) * 2001-12-27 2007-10-01 주식회사 하이닉스반도체 Method for fabricating a photomask
KR100745065B1 (en) * 2004-12-27 2007-08-01 주식회사 하이닉스반도체 Method for removing a growth particle on Phase Shift Mask

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