KR970053792A - Protective element of semiconductor device - Google Patents

Protective element of semiconductor device Download PDF

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Publication number
KR970053792A
KR970053792A KR1019950068221A KR19950068221A KR970053792A KR 970053792 A KR970053792 A KR 970053792A KR 1019950068221 A KR1019950068221 A KR 1019950068221A KR 19950068221 A KR19950068221 A KR 19950068221A KR 970053792 A KR970053792 A KR 970053792A
Authority
KR
South Korea
Prior art keywords
region
semiconductor device
protection element
substrate
internal circuit
Prior art date
Application number
KR1019950068221A
Other languages
Korean (ko)
Other versions
KR0169359B1 (en
Inventor
권규형
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950068221A priority Critical patent/KR0169359B1/en
Priority to JP8284361A priority patent/JPH09191079A/en
Publication of KR970053792A publication Critical patent/KR970053792A/en
Application granted granted Critical
Publication of KR0169359B1 publication Critical patent/KR0169359B1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02469Group 12/16 materials
    • H01L21/02472Oxides

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

본 발명은 반도체 장치의 보호 소자에 관한 것으로서, 더욱 상세하게는, 동작 전압을 낮춘 입출력 보호 소자에 관한 것이다. 본 발명에 따른 반도체 장치의 보호 소자는 고립된 베이스 영역을 가지는 접합 트랜지스터로서 이미터 영역은 보호하고자 하는 내부 회로의 입력단에 연결되고 컬렉터 영역은 내부 회로의 전원 전압에 연결된다. 이 때, 컬렉터 영역의 역할을 하는 기판을 외부와 연결하는 고농도 n+영역을 베이스 영역과 접하게 하여 음의 전압이 인가되는 경우 컬렉터-베이스 간 항복이 고농도 n+영역과 베이스 영역의 사이에서 일어나게 함으로써 동작 전압을 줄일 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a protection element of a semiconductor device, and more particularly, to an input / output protection element having a lower operating voltage. The protection element of the semiconductor device according to the present invention is a junction transistor having an isolated base region, the emitter region is connected to the input terminal of the internal circuit to be protected, and the collector region is connected to the power supply voltage of the internal circuit. At this time, the high concentration n + region connecting the substrate serving as the collector region to the outside is brought into contact with the base region so that when a negative voltage is applied, the collector-base breakdown occurs between the high concentration n + region and the base region. The operating voltage can be reduced.

Description

반도체 장치의 보호 소자Protective element of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제5도는 본 발명의 실시예에 따른 반도체 장치의 보호 소자의 단면도이다.5 is a cross-sectional view of a protection element of the semiconductor device according to the embodiment of the present invention.

Claims (6)

제1도전형의 반도체 기판, 상기 기판에 형성되어 있는 제2도전형의 제1영역, 상기 제1영역에 형성되어 있는 제1도전형의 제2영역, 그리고 상기 기판에 상기 기판보다 고농도로 형성되어 있으며 상기 제1영역과 닿아 있는 제1도전형의 제3영역을 포함하는 반도체 장치의 보호 소자.A semiconductor substrate of a first conductive type, a first region of a second conductive type formed on the substrate, a second region of a first conductive type formed on the first region, and a higher concentration than the substrate on the substrate And a third region of a first conductivity type in contact with the first region. 제1항에서, 상기 제1도전형은 n형이고 상기 제2도전형은 p형인 입출력 보호 소자.The input / output protection device of claim 1, wherein the first conductivity type is n-type and the second conductivity type is p-type. 제1항에서, 상기 제2영역은 상기 기판보다 고농도인 반도체 장치의 보호 소자.The protection device of claim 1, wherein the second region is more concentrated than the substrate. 제1항에서, 상기 제2영역과 상기 제3영역의 사이에 형성되어 있는 산화막을 더 포함하는 반도체 장치의 보호 소자.The protection element of claim 1, further comprising an oxide film formed between the second region and the third region. 제1항에서, 상기 제1영역은 외부와 연결되지 않는 반도체 장치의 보호 소자.The protection device of claim 1, wherein the first region is not connected to an external device. 제1항에서, 상기 제2영역은 보호하고자 하는 내부 회로의 입력단과 연결되고 상기 제3영역은 상기 내부 회로의 전원 전압이 인가되는 반도체 장치의 보호 소자.The protection device of claim 1, wherein the second region is connected to an input terminal of an internal circuit to be protected, and the third region is applied with a power supply voltage of the internal circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950068221A 1995-12-30 1995-12-30 Protection device of semiconductor device KR0169359B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019950068221A KR0169359B1 (en) 1995-12-30 1995-12-30 Protection device of semiconductor device
JP8284361A JPH09191079A (en) 1995-12-30 1996-10-25 Protective element of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950068221A KR0169359B1 (en) 1995-12-30 1995-12-30 Protection device of semiconductor device

Publications (2)

Publication Number Publication Date
KR970053792A true KR970053792A (en) 1997-07-31
KR0169359B1 KR0169359B1 (en) 1999-01-15

Family

ID=19447979

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950068221A KR0169359B1 (en) 1995-12-30 1995-12-30 Protection device of semiconductor device

Country Status (2)

Country Link
JP (1) JPH09191079A (en)
KR (1) KR0169359B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8648419B2 (en) * 2010-01-20 2014-02-11 Freescale Semiconductor, Inc. ESD protection device and method
US9543420B2 (en) 2013-07-19 2017-01-10 Nxp Usa, Inc. Protection device and related fabrication methods

Also Published As

Publication number Publication date
KR0169359B1 (en) 1999-01-15
JPH09191079A (en) 1997-07-22

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