KR970053408A - Device Separation Method of Semiconductor Device - Google Patents

Abstract

The present invention relates to a method of manufacturing a device isolation film of a semiconductor device, the present invention forms a pad oxide film, a first nitride film, a polysilicon pattern and a second nitride film pattern on an upper portion of the semiconductor substrate, and a predetermined portion of the polysilicon pattern Oxidation is performed to form a first oxide film, the first nitride film pattern and the pad oxide film pattern are formed using the first oxide film as a mask, and then a field oxide film is formed to reduce burj bic and contact the nitride film with the semiconductor substrate. This prevents leakage current.

Description

Device Separation Method of Semiconductor Device

As this is a public information case, the full text was not included.

2A through 2F are diagrams illustrating a process of fabricating an isolation layer in a semiconductor device according to an embodiment of the present invention.

Claims (14)

Forming a pad oxide film, a first nitride film, a polysilicon layer, and a second nitride film on the semiconductor substrate, and forming a second nitride film pattern and a polysilicon pattern using a mask for forming a device isolation region. And oxidizing the polysilicon pattern to form a first oxide film from a sidewall to an isolation region, forming a first nitride film pattern using the first oxide film as a mask, and forming a portion of the first oxide film. And removing the pad oxide film pattern using the first nitride film pattern as a mask, and subsequently, using the first nitride film pattern as a mask to form a pad oxide film pattern. Oxidizing to form a field oxide film, removing the second nitride film pattern, the polysilicon pattern, the remaining first oxide film, the first nitride film pattern, and the pad oxide film pattern. Device isolation film manufacturing method of a semiconductor device comprising the step of. The method of claim 1, wherein the pad oxide film is formed to a thickness of 30 to 300 Å. The method of claim 1, wherein the first nitride film is formed to a thickness of about 50 to about 500 microns. The method of claim 1, wherein the polysilicon layer is formed to a thickness of 200 to 700 Å. 2. The method of claim 1, wherein the second nitride film is formed to a thickness of 500 to 3000 mW. The method of claim 1, wherein the polysilicon pattern is wet oxidized at a temperature of 800 to 1200 ° C. 6. The method of claim 1, wherein when the first nitride layer pattern is formed, an oxide layer is removed by adjusting an etch selectivity between the first nitride layer pattern and the oxide layer pattern. The method of claim 1, wherein when the groove is formed, the semiconductor substrate is etched by 50 to 500 Å. The method of claim 1, wherein when the groove is formed, the first nitride film is not etched by increasing the etching selectivity between the first nitride film and the semiconductor substrate. The method of claim 1, wherein the field oxide film is formed to a thickness of 1000 to 5000 kPa at a temperature of 800 to 1200 ° C. 7. The method of claim 1, wherein the second nitride film pattern is removed with a phosphoric acid solution. The method of claim 1, wherein the polysilicon pattern and the remaining first oxide film remove nitric acid, acetic acid, and hydrofluoric acid with a mixed solution. The method of claim 1, wherein the first nitride film pattern is removed with a phosphoric acid solution. The method of claim 1, wherein the pad oxide layer pattern is removed using a hydrofluoric acid solution or a BOE solution. ※ Note: The disclosure is based on the initial application.