KR970053263A

KR970053263A - Method of forming inspection pattern of semiconductor device

Info

Publication number: KR970053263A
Application number: KR1019950065871A
Authority: KR
Inventors: 김학규
Original assignee: 김광호; 삼성전자 주식회사
Priority date: 1995-12-29
Filing date: 1995-12-29
Publication date: 1997-07-31

Abstract

본 발명은 반도체 장치의 사진/식각 공정에서 각층의 단차 정도에 검사할 수 있는 패턴의 형성 방법에 관한 것으로서, 지정 영역에 식각될 부분이 형성되고 제1단차가 형성되도록 매스크를 설계한 제1검사패턴과; 상기 제1단차를 가로지르면서 제2단차가 형성될 수 있도록 상기 제1검사패턴 내부에 형성하되, 최소 패턴과 원하는 패턴을 크기가 동일하게 3개 이상 형성하면서 메사및 트랜치 구조가 교차하도록 매스크를 설계한 제2검사패턴; 상기에서 형성되는 하부의 검사 패턴 내부에 최소 패턴과 원하는 패턴이 적어도 3개 이상형성되도록 최종 검사패턴을 형성하는 단계를 포함하여 이루어지는 것으로, 검사 영역에 각 단차를 모두 형성하고 다음 공정에서 형성되는 패턴을 각 단차에 모두 형성할 수 있도록 매스크를 제작하는 것으로, 각 단차 및 막질의 종류에 따른 해상도 및 불량 유무를 쉽게 판단할 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a pattern that can be inspected at a step degree of each layer in a photo / etching process of a semiconductor device. Patterns; It is formed inside the first inspection pattern to form a second step while crossing the first step, forming a mask so that the mesa and the trench structure intersect, forming at least three of the minimum pattern and the desired pattern the same size. A designed second inspection pattern; And forming a final inspection pattern such that a minimum pattern and at least three desired patterns are formed inside the lower inspection pattern formed above, and forming each step in the inspection area and forming the pattern in the next process. By manufacturing the mask to form all of the steps, it is possible to easily determine the resolution and the presence or absence of each step and the type of film quality.

Description

Method of forming inspection pattern of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 따른 반도체 장치의 사진/식각 공정에서의 단차 정도에 따른 검사패턴 형성 과정을 순차적으로 도시한 공정도.1 is a process diagram sequentially illustrating a process of forming an inspection pattern according to a degree of step in a photo / etch process of a semiconductor device according to the present invention.

Claims

A first inspection pattern in which a mask is designed such that a portion to be etched is formed in a designated area and a first step is formed; It is formed inside the first inspection pattern to form a second step while crossing the first step, forming a mask so that the mesa and the trench structure intersect, forming at least three of the minimum pattern and the desired pattern the same size. A designed second inspection pattern; A plurality of inspection patterns having a minimum pattern and three or more desired patterns having the same size in the lower inspection pattern formed above, the masks having a mesa and a trench structure intersecting all of the steps, and crossing the steps; And forming a final inspection pattern to cross all of the above-described steps and to form at least three or more minimum patterns and desired patterns.

※ Note: The disclosure is based on the initial application.