KR950025927A - Semiconductor device manufacturing method - Google Patents
Semiconductor device manufacturing method Download PDFInfo
- Publication number
- KR950025927A KR950025927A KR1019940003133A KR19940003133A KR950025927A KR 950025927 A KR950025927 A KR 950025927A KR 1019940003133 A KR1019940003133 A KR 1019940003133A KR 19940003133 A KR19940003133 A KR 19940003133A KR 950025927 A KR950025927 A KR 950025927A
- Authority
- KR
- South Korea
- Prior art keywords
- oxide film
- contact hole
- doped oxide
- forming
- layer wiring
- Prior art date
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Abstract
본 발명은 반도체장치의 제조방법에 관한 것으로, 서브마이크로 소자에 적용이 가능한 미세콘택을 형성하기 위한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and to forming a microcontact applicable to a submicro device.
본 발명은 하층배선이 형성된 반도체기판상에 언도우프드 산화막과 제1도우프드 산화막을 차례로 형성하는 공정과, 상기 제1도우프드 산화막상에 포토레지스트를 도포하는 공정, 상기 포토레지스트를 선택적으로 노광 및 현상하여 콘택홀패턴을 형성하는 공정, 상기 콘택홀패턴을 마스크로 하여 상기 언도우프드산화막과 제1도우프드 산화막을 이방성식각하여 상기 하층배선을 노출시키는 콘택홀을 형성하는 공정, 상기 콘택홀패턴을 제거하는 공정, 상기 제1도우프드 산화막 상부에 제2도우프드 산화막을 형성하는 공정, 상기 도우프드 산화막을 에치백하는 공정, 상기 콘택홀 상부에 상층배선을 형성하는 공정으로 이루어진 것을 특징으로 하는 반도체장치 제조방법을 제공한다The present invention provides a method of sequentially forming an undoped oxide film and a first doped oxide film on a semiconductor substrate on which a lower layer wiring is formed, applying a photoresist on the first doped oxide film, and selectively exposing the photoresist. And developing the contact hole pattern by anisotropically forming the contact hole exposing the lower layer wiring by anisotropically etching the undoped oxide layer and the first doped oxide layer using the contact hole pattern as a mask, wherein the contact hole is formed. Removing the pattern, forming a second doped oxide film on the first doped oxide film, etching back the doped oxide film, and forming an upper layer wiring on the contact hole. Provided is a semiconductor device manufacturing method.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 종래의 반도체장치의 콘택형성방법을 도시한 도면.2 is a view showing a contact forming method of a conventional semiconductor device.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940003133A KR100281101B1 (en) | 1994-02-22 | 1994-02-22 | Semiconductor device manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940003133A KR100281101B1 (en) | 1994-02-22 | 1994-02-22 | Semiconductor device manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR950025927A true KR950025927A (en) | 1995-09-18 |
| KR100281101B1 KR100281101B1 (en) | 2001-03-02 |
Family
ID=66689785
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019940003133A KR100281101B1 (en) | 1994-02-22 | 1994-02-22 | Semiconductor device manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR100281101B1 (en) |
-
1994
- 1994-02-22 KR KR1019940003133A patent/KR100281101B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR100281101B1 (en) | 2001-03-02 |
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| Date | Code | Title | Description |
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| A201 | Request for examination | ||
| E701 | Decision to grant or registration of patent right | ||
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| FPAY | Annual fee payment |
Payment date: 20091028 Year of fee payment: 10 |
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| LAPS | Lapse due to unpaid annual fee |