KR970052924A - Method for forming conductive wiring in semiconductor device - Google Patents

Method for forming conductive wiring in semiconductor device Download PDF

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Publication number
KR970052924A
KR970052924A KR1019950046984A KR19950046984A KR970052924A KR 970052924 A KR970052924 A KR 970052924A KR 1019950046984 A KR1019950046984 A KR 1019950046984A KR 19950046984 A KR19950046984 A KR 19950046984A KR 970052924 A KR970052924 A KR 970052924A
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KR
South Korea
Prior art keywords
conductive wiring
polycrystalline silicon
silicon film
forming
undoped
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Application number
KR1019950046984A
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Korean (ko)
Inventor
김현수
이석규
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019950046984A priority Critical patent/KR970052924A/en
Publication of KR970052924A publication Critical patent/KR970052924A/en

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Abstract

본 발명은 반도체 소자의 도전배선 형성방법에 관한 것으로, 반도체기판 상부에 소정두께 도프된 다결정실리콘막, 도프안된 다결정실리콘막 및 DCS 텅스텐 실리사이드를 순차적으로 형성하고 도전배선마스크를 이용한 식각공정으로 상기 DCS 텅스텐 실리사이드, 도프안된 다결정실리콘막 및 도프된 다결정실리콘막을 순차적으로 식각한 다음, 후속 열공정을 실시하여 불순물을 활성화시킴으로써 상기 도프안된 다결정실리콘막에 도핑시켜 하부 도전배선층과 텅스텐 실리사이드로 형성되어 소자의 특성 및 신뢰성이 향상된 도전배선을 형성함으로써 반도체소자의 특성 및 신뢰성을 향상시키고 그에 따른 반도체 소자의 고집적화를 가능하게 하는 기술이다.The present invention relates to a method for forming a conductive wiring of a semiconductor device, and sequentially forming a predetermined thickness doped polysilicon film, an undoped polysilicon film, and a DCS tungsten silicide in an etch process using a conductive wiring mask. Tungsten silicide, undoped polysilicon film and doped polysilicon film are sequentially etched, and then a subsequent thermal process is performed to dope the undoped polycrystalline silicon film by activating impurities to form a lower conductive wiring layer and tungsten silicide to form the device. By forming a conductive wiring with improved characteristics and reliability, it is a technology that improves the characteristics and reliability of a semiconductor device and thereby enables high integration of the semiconductor device.

Description

반도체 소자의 도전배선 형성방법.A method for forming conductive wirings in semiconductor devices.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1C도는 본 발명의 실시예에 따른 반도체 소자의 도전배선 형성공정을 도시한 단면도.1A to 1C are cross-sectional views showing a conductive wiring forming process of a semiconductor device according to an embodiment of the present invention.

Claims (6)

반도체 기판 상부에 하부 도전배선층을 소정두께 형성하는 공정과, 상기 하부도전배선층 상부에 CVD 방법으로 도프된 다결정 실리콘막을 소정두께 형성하는 공정과, 상기 도프된 다결정실리콘막 상부에 얇은 도프안된 다결정 실리콘막을 형성하는 공정과, 상기 도프안된 다결정실리콘막 상부에 DCS 텅스텐 실리사이드를 소정두께 형성하는 공정과, 도전배선마스크를 이용한 식각공정으로 상기 DCS 텅스텐 실리사이드, 도프안된 다결정 실리콘막 및 도프된 다결정실리콘막을 순차적으로 식각하는 공정과, 후속열공정으로 상기 도프안된 다결정실리콘막에 불순물을 도프된 다결정실리콘막으로 형성함으로써 도전 배선을 형성하는 공정을 포함하는 반도체 소자의 도전배선 형성방법.Forming a predetermined thickness of a lower conductive wiring layer on the semiconductor substrate, forming a predetermined thickness of the polycrystalline silicon film doped by the CVD method on the lower conductive wiring layer, and a thin undoped polycrystalline silicon film on the doped polycrystalline silicon film. Forming DCS tungsten silicide a predetermined thickness on the undoped polycrystalline silicon film and etching using a conductive wiring mask in order to sequentially form the DCS tungsten silicide, the undoped polycrystalline silicon film and the doped polycrystalline silicon film. And forming a conductive wiring by etching the doped polycrystalline silicon film into a doped polycrystalline silicon film in a subsequent thermal process. 제1항에 있어서, 상기 도프된 다결정실리콘막은 400 내지 700℃의 온도에서 인-수트공정으로 형성되는 것을 특징으로 하는 반도체 소자의 도전배선 형성방법.The method of claim 1, wherein the doped polysilicon film is formed by an in-suit process at a temperature of 400 to 700 ° C. 7. 제1항에 있어서, 상기 인-수프공정은 PH3와 SiH4가스가 사용되는 것을 특징으로 하는 반도체 소자의 도전배선 형성방법.The method of claim 1, wherein the phosphorus-soup process uses PH 3 and SiH 4 gas. 제1항 또는 제3항에 있어서, 상기 도프안된 다결정실리콘막은 PH3가스의 유입이 차단되는 중착공정으로 형성되는 것을 특징으로 하는 반도체 소자의 도전배선 형성방법.4. The method of claim 1 or 3, wherein the undoped polysilicon film is formed by a deposition process in which inflow of PH 3 gas is blocked. 제1항에 있어서, 상기 도프안된 다결정실리콘막은 50 내지 500Å 두께로 형성되는 것을 특징으로 하는 반도체 소자의 도전배선 형성방법.The method of claim 1, wherein the undoped polysilicon film is formed to a thickness of 50 to 500 GPa. 제1항에 있어서, 상기 DCS 텅스텐 실리사이드는 400 내지 700℃의 온도에서 형성되는 것을 특징으로 하는 반도체 소자의 도전배선 형성방법.The method of claim 1, wherein the tungsten silicide DCS is formed at a temperature of 400 to 700 ℃. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950046984A 1995-12-06 1995-12-06 Method for forming conductive wiring in semiconductor device KR970052924A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950046984A KR970052924A (en) 1995-12-06 1995-12-06 Method for forming conductive wiring in semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950046984A KR970052924A (en) 1995-12-06 1995-12-06 Method for forming conductive wiring in semiconductor device

Publications (1)

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KR970052924A true KR970052924A (en) 1997-07-29

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KR1019950046984A KR970052924A (en) 1995-12-06 1995-12-06 Method for forming conductive wiring in semiconductor device

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