KR970018661A - Tungsten Polyside Gate Electrode Formation Method With Barrier Layer - Google Patents
Tungsten Polyside Gate Electrode Formation Method With Barrier Layer Download PDFInfo
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- KR970018661A KR970018661A KR1019950031107A KR19950031107A KR970018661A KR 970018661 A KR970018661 A KR 970018661A KR 1019950031107 A KR1019950031107 A KR 1019950031107A KR 19950031107 A KR19950031107 A KR 19950031107A KR 970018661 A KR970018661 A KR 970018661A
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- barrier layer
- tungsten
- depositing
- barrier
- deposition
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- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
본 발명은 장벽층(Barrier Layer)을 이용한 텅스텐 실리사이드 증착방법에 관한 것으로서, 다결정 실리콘상에 장벽 금속(barrier metal)을 증착하는 단계; 및 SiH2Cl2를 이용하여 텅스텐 실리사이드를 증착하는 단계를 포함함을 특징으로 한다.The present invention relates to a tungsten silicide deposition method using a barrier layer, comprising: depositing a barrier metal on polycrystalline silicon; And depositing tungsten silicide using SiH 2 Cl 2 .
본 발명에 의한 텅스텐 장벽층을 갖는 텅스텐 폴리사이드 게이트전극 형성방법은 텅스텐 실리사이드 하부에 장벽층(barrier layer)증착시 WF6와 NH3를 이용하여 증착을 하기 때문에 WF6와 다결정실리콘과의 반응에 의한 실리콘 소모를 크게 억제시킬 수 있다. 이는 장벽층을 플라즈마(plasma)상태로 증착을 하고 저온 공정이 가능하기 때문에 장벽층(barrier layer) 증착과정에서 웜홀(wormhole)의 생성 없이 텅스텐질화막을 증착할 수 있기 때문이다. 따라서 후속 공정인 고온 공정인 SiH2Cl2-기반 텅스텐 실리사이드 증착시 텅스텐 질화막의 장벽(barrier) 특성 때문에 초기 증착에서의 웜홀(wormhole)의 발생을 억제하는 장점을 가지고 있다.Tungsten polycide gate electrode forming method having a tungsten barrier layer according to the invention because the deposition by using the barrier layer (barrier layer) deposited upon WF 6 and NH 3 in the tungsten suicide lower the reaction with WF 6 and polysilicon It is possible to greatly suppress the silicon consumption caused by. This is because the barrier layer is deposited in a plasma state and a low temperature process is possible, so that a tungsten nitride film can be deposited without generating a wormhole during the barrier layer deposition process. Therefore, the SiH 2 Cl 2 -based tungsten silicide deposition, which is a subsequent high temperature process, has the advantage of suppressing the occurrence of wormholes in the initial deposition due to the barrier property of the tungsten nitride film.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제3A도 내지 제3C도는 본 발명의 텅스텐 폴리사이드 게이트 전극 형성방법을 설명하기 위해 도시한 단면도들이다.3A to 3C are cross-sectional views illustrating a method of forming a tungsten polyside gate electrode of the present invention.
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019950031107A KR970018661A (en) | 1995-09-21 | 1995-09-21 | Tungsten Polyside Gate Electrode Formation Method With Barrier Layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019950031107A KR970018661A (en) | 1995-09-21 | 1995-09-21 | Tungsten Polyside Gate Electrode Formation Method With Barrier Layer |
Publications (1)
Publication Number | Publication Date |
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KR970018661A true KR970018661A (en) | 1997-04-30 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019950031107A KR970018661A (en) | 1995-09-21 | 1995-09-21 | Tungsten Polyside Gate Electrode Formation Method With Barrier Layer |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100433509B1 (en) * | 1998-08-21 | 2004-05-31 | 미크론 테크놀로지,인코포레이티드 | Field effect transistors, integrated circuitry, methods of forming field effect transistor gates, and methods of forming integrated circuitry |
KR100475897B1 (en) * | 1997-12-29 | 2005-06-21 | 주식회사 하이닉스반도체 | Manufacturing method of semiconductor device |
KR100500924B1 (en) * | 1999-12-30 | 2005-07-14 | 주식회사 하이닉스반도체 | Method for forming tungsten electrode in memory device |
-
1995
- 1995-09-21 KR KR1019950031107A patent/KR970018661A/en not_active Application Discontinuation
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100475897B1 (en) * | 1997-12-29 | 2005-06-21 | 주식회사 하이닉스반도체 | Manufacturing method of semiconductor device |
KR100433509B1 (en) * | 1998-08-21 | 2004-05-31 | 미크론 테크놀로지,인코포레이티드 | Field effect transistors, integrated circuitry, methods of forming field effect transistor gates, and methods of forming integrated circuitry |
US6882017B2 (en) | 1998-08-21 | 2005-04-19 | Micron Technology, Inc. | Field effect transistors and integrated circuitry |
US6939799B2 (en) | 1998-08-21 | 2005-09-06 | Micron Technology, Inc. | Method of forming a field effect transistor and methods of forming integrated circuitry |
KR100500924B1 (en) * | 1999-12-30 | 2005-07-14 | 주식회사 하이닉스반도체 | Method for forming tungsten electrode in memory device |
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