KR970052859A - Method of manufacturing silicide semiconductor device - Google Patents

Method of manufacturing silicide semiconductor device Download PDF

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Publication number
KR970052859A
KR970052859A KR1019950065848A KR19950065848A KR970052859A KR 970052859 A KR970052859 A KR 970052859A KR 1019950065848 A KR1019950065848 A KR 1019950065848A KR 19950065848 A KR19950065848 A KR 19950065848A KR 970052859 A KR970052859 A KR 970052859A
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KR
South Korea
Prior art keywords
oxide film
gate electrode
forming
etching
nitride film
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KR1019950065848A
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Korean (ko)
Inventor
김성봉
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김광호
삼성전자 주식회사
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Priority to KR1019950065848A priority Critical patent/KR970052859A/en
Publication of KR970052859A publication Critical patent/KR970052859A/en

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Abstract

본 발명은 실리사이드 반도체 소자의 제조방법에 관한 것으로서, 특히 실리콘 기판 상의 필드 산화막으로 한정된 액티브 영역에 게이트 산화막을 형성하고 그 위에 게이트전극을 형성하고 게이트 전극에 자기 정렬된 저농도 불순물층을 액티브영역의 실리콘 기판의 표면 근방에 형성하는 단계; 결과물 상에 질화막 및 산화막을 적층한 후, 이방성 식각을 진행하여 스페이서를 형성하고 이온주입 공정으로 스페이서에 자기 정렬된 고농도 불순물층을 액티브영역의 실리콘 기판의 표면 근방에 형성하는 단계; 질화막과 고농도 불순물층 위의 게이트 산화막을 차례로 식각하는 단계; 결과물의 전면에 고융점금속을 침적한 후, 열처리하여 반도체 기판 표면의 실리콘에 접한 영역과 폴리실리콘 상층 표면부위의 실리콘 원자가 고융점 금속과 반응하여 실리사이드를 형성하고 습식식각에 실리사이드화가 안된 고융점 금속을 제거하는 단계를 구비하는 것을 특징으로 한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a silicide semiconductor device, and in particular, a gate oxide film is formed in an active region defined by a field oxide film on a silicon substrate, a gate electrode is formed thereon, and a low concentration impurity layer self-aligned to the gate electrode is formed in the silicon of the active region. Forming near the surface of the substrate; Stacking a nitride film and an oxide film on the resultant, performing anisotropic etching to form a spacer, and forming a highly doped impurity layer self-aligned to the spacer near the surface of the silicon substrate in the active region by an ion implantation process; Etching sequentially the nitride film and the gate oxide film on the high concentration impurity layer; After depositing a high melting point metal on the entire surface of the resultant, heat treatment to form a silicide by the silicon atoms on the surface of the semiconductor substrate and the silicon atoms on the upper surface of the polysilicon react with the high melting point metal to form silicide and not to be silicided in wet etching. It characterized in that it comprises a step of removing.

따라서, 본 발명에서는 게이트 전극과 소스/드레인 사이의 유효거리를 길게 함으로써 실리사이드화로 인한 단락을 방지할 수 있다.Therefore, in the present invention, by shortening the effective distance between the gate electrode and the source / drain, it is possible to prevent a short circuit due to silicidation.

Description

실리사이드 반도체 소자의 제조방법.Method of manufacturing silicide semiconductor device.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2A∼2E도는 본 발명에 의한 실리사이드 반도체 소자의 바람직한 일실시예의 제조순서를 나타낸 도면.2A to 2E are views showing a manufacturing procedure of a preferred embodiment of the silicide semiconductor device according to the present invention.

Claims (2)

실리콘 기판 상의 필드 산화막으로 한정된 액티브 영역에 게이트 산화막을 형성하고 그 위에 게이트전극을 형성하고 게이트 전극에 자기 정렬된 저농도 불순물층을 액티브영역의 실리콘 기판의 표면 근방에 형성하는 단계; 상기 결과물 상에 질화막 및 산화막을 적층한 후, 이방성 식각을 진행하여 스페이서를 형성하고 이온주입 공정으로 스페이서에 자기 정렬된 고농도 불순물층을 액티브영역의 실리콘 기판의 표면 근방에 형성하는 단계; 질화막과 고농도 불순물층 위의 게이트 산화막을 차례로 식각하는 단계; 상기 결과물의 전면에 고융점금속을 침적한 후, 열처리하여 반도체 기판 표면의 실리콘에 접한 영역과 폴리실리콘 상층 표면부위의 실리콘 원자가 고융점 금속과 반응하여 실리사이드를 형성하고 습식식각에 실리사이드화가 안된 고융점 금속을 제거하는 단계를 구비하는 것을 특징으로 하는 실리사이드 반도체 소자의 제조방법.Forming a gate oxide film in an active region defined by a field oxide film on the silicon substrate, forming a gate electrode thereon, and forming a low concentration impurity layer self-aligned to the gate electrode near the surface of the silicon substrate in the active region; Stacking a nitride film and an oxide film on the resultant, performing anisotropic etching to form a spacer, and forming a highly doped impurity layer near the surface of the silicon substrate in the active region by an ion implantation process; Etching sequentially the nitride film and the gate oxide film on the high concentration impurity layer; After depositing a high melting point metal on the entire surface of the resultant product, heat treatment is performed so that silicon atoms on the surface of the semiconductor substrate and the silicon atoms on the upper surface of the polysilicon react with the high melting point metal to form silicide, and do not suicide in wet etching. A method of manufacturing a silicide semiconductor device, comprising the step of removing a metal. 실리콘 기판 상의 필드 산화막으로 한정된 액티브 영역에 게이트 산화막을 형성하고 그 위에 게이트전극을 형성하고 게이트 전극에 자기 정렬된 저농도 불순물층을 액티브영역의 실리콘 기판의 표면 근방에 형성하는 단계; 두꺼운 질화막과 산화막을 순차적으로 적층하고 일차적으로 이방성 식각하여 게이트전극과 게이트전극 주연부의 질화막 상층부에만 산화막이 일정 두께로 남도록 식각하는 단계; 드러난 질화막을 소정의 두께만 남도록 식각하는 단계; 이방성 식각으로 남겨진 산화막을 추가로 식각하여 게이트 전극 상층부의 질화막이 보일 때까지 식각하여 스페이서를 형성하는 단계; 질화막을 산화막에 대하여 높은 선택비로 식각하면 소오스/드레인 영역을 상부의 질화막과 함께 폴리실리콘 게이트전극 상부의 질화막도 같이 제거되어 단차가 큰 함몰된 구조를 형성하는 단계; 및 이온주입 공정으로 고농도의 불순물층을 형성하고, 고융점금속을 침적한 후, 열처리하여 반도체기판 표면의 실리콘 및 폴리실리콘 상층 표면부위의 실리콘과 고융점금속이 반응하여 실리사이드를 형성하는 단계를 구비하는 것을 특징으로 한다.Forming a gate oxide film in an active region defined by a field oxide film on the silicon substrate, forming a gate electrode thereon, and forming a low concentration impurity layer self-aligned to the gate electrode near the surface of the silicon substrate in the active region; Stacking a thick nitride film and an oxide film sequentially and anisotropically etching them to etch the oxide film so that the oxide film remains at a predetermined thickness only on the nitride film upper layer portion of the gate electrode and the peripheral edge of the gate electrode; Etching the exposed nitride film so that only a predetermined thickness remains; Further etching the oxide film left by the anisotropic etching until the nitride film of the gate electrode upper portion is visible to form a spacer; Etching the nitride film at a high selectivity with respect to the oxide film to remove the source / drain region together with the nitride film on the upper portion of the polysilicon gate electrode, thereby forming a recessed structure having a large step; And forming an impurity layer having a high concentration by ion implantation, depositing a high melting point metal, and then heat treating the silicon and the high melting point metal on the surface of the upper surface of the silicon and polysilicon to form a silicide. Characterized in that. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950065848A 1995-12-29 1995-12-29 Method of manufacturing silicide semiconductor device KR970052859A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100469149B1 (en) * 1997-12-31 2005-05-17 주식회사 하이닉스반도체 Manufacturing method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100469149B1 (en) * 1997-12-31 2005-05-17 주식회사 하이닉스반도체 Manufacturing method of semiconductor device

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