KR970030890A - MOS type field effect transistor and its manufacturing method - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and in particular, an insulated gate field effect transistor (hereinafter referred to as 'LDD-MOS FET') having an LED structure which improves device characteristics by forming sidewalls of polysilicon; It relates to a manufacturing method. The LDD-MOS FET according to the present invention comprises a source / drain region of an LDD structure formed on the left and right sides of an upper part of a silicon substrate, a first oxide layer formed on the silicon substrate, and a first conductive layer and a second conductive layer formed on the first oxide layer. And a gate formed of a stacked structure of an oxide film, a sidewall spacer formed of a second conductive layer on the side of the gate, and a third oxide film deposited on the entire surface of the device around the gate and the sidewall. On the other hand, the sidewalls are formed by depositing a conductive material and then etched back, and the source / drain regions are formed by injecting low concentration ions using a gate and sidewall as a mask, and injecting high concentration ions after depositing a third oxide film. . Therefore, the LDD-MOS FET does not generate a leakage current during non-conduction, thereby preventing deterioration of device characteristics.

Description

MOS type field effect transistor and its manufacturing method

As this is a public information case, the full text was not included.

2 (a) to 2 (e) of FIG. 2 are cross-sectional views for explaining the manufacturing process of the MOS-type field effect transistor of the LED structure according to the present invention.

Claims (6)

A silicon substrate; Source / drain regions formed on the left and right sides of the upper portion of the silicon substrate; A first oxide film formed over the silicon substrate and the source / drain regions; A gate formed on the first oxide film in a stacked structure of a first conductive layer and a second oxide film; A sidewall spacer formed on the side of the gate as a second conductive layer; And a third oxide film deposited on the entire surface of the device around the gate electrode and the sidewalls of the MOS type field effect transistor. The second conductive layer of claim 1, wherein the first conductive layer is made of polysilicon containing a first dopant of the same type as the source / drain region, and the second conductive layer is a second plate opposite to the first dopant. A Mohs type field effect transistor, comprising polysilicon containing a sorbite. The MOS type field effect transistor according to claim 1, wherein the source / drain region is divided into a low concentration region and a high concentration region. The Morse type field effect transistor according to claim 1, wherein the source / drain region is divided into a low concentration region, a medium concentration region, and a high concentration region. Forming a first oxide film on the silicon substrate and sequentially stacking the first conductive layer and the second oxide film; Forming a gate by patterning the second oxide film and the first conductive layer by a photolithography process; Depositing a second conductive layer around the gate and etching to form a sidewall spacer on a side of the gate; Implanting low concentration impurity ions using the gate electrode and sidewall spacers as a mask; And depositing a third insulating film on the entire surface of the device around the gate electrode and the sidewall, and injecting and heat-treating a high concentration of impurity ions to form the MOS-type field effect transistor. The method of claim 5, wherein the implanting of ions comprises implanting low concentration ions using a gate as a mask to form a source / drain region of a triple junction structure, and implanting medium ions using a gate and sidewalls as a mask. And a step of implanting high concentration ions using the third oxide film as a mask. ※ Note: The disclosure is based on the initial application.