KR970024117A - Semiconductor package and manufacturing method - Google Patents
Semiconductor package and manufacturing method Download PDFInfo
- Publication number
- KR970024117A KR970024117A KR1019950037210A KR19950037210A KR970024117A KR 970024117 A KR970024117 A KR 970024117A KR 1019950037210 A KR1019950037210 A KR 1019950037210A KR 19950037210 A KR19950037210 A KR 19950037210A KR 970024117 A KR970024117 A KR 970024117A
- Authority
- KR
- South Korea
- Prior art keywords
- lead
- mold
- semiconductor chip
- semiconductor package
- parallel
- Prior art date
Links
Abstract
외부리드가 몰드의 바닥면에 평행하게 부착된 반도체 패키지 및 그 제조방법이 개시되어 있다.Disclosed are a semiconductor package in which an external lead is attached in parallel to a bottom surface of a mold, and a method of manufacturing the same.
본 발명의 반도체 패키지는, 다이 패드상에 탑재된 반도체 칩과, 일단부가 상기 반도체 칩과 전기적으로 접속되어 있는 갈매기 날개 형상의 리드와, 상기 리드의 타단부가 외부로 도출되는 형태로 상기 반도체 칩 및 리드의 일부를 봉합하는 몰드를 구비하여 이루어지는 반도체 패키지에 있어서, 상기 몰드의 바닥면은 평탄면으로 되어 있으며, 상기 리드의 타단부는 상기 몰드의 바닥면상에 바닥면에 대하여 평행하게 부착되어 있는 것을 특징으로 한다.The semiconductor package of the present invention includes a semiconductor chip mounted on a die pad, a gull-shaped lead whose one end is electrically connected to the semiconductor chip, and the other end of the lead being drawn outward. And a mold for sealing a part of the lid, wherein the bottom surface of the mold is a flat surface, and the other end of the lead is attached to the bottom surface of the mold in parallel with the bottom surface. It is characterized by.
따라서, 트리밍공정과 포밍고정이 삭제되어 불량 발생이 줄어 원가절감의 효과가 있다.Therefore, the trimming process and the forming fixing is eliminated, thereby reducing the occurrence of defects, thereby reducing the cost.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제2도는 본 발명의 일 실시예를 구현하기 위하여 미리 형성된 리드프레임 구조를 나타낸 개략도이다.2 is a schematic view showing a leadframe structure formed in advance to implement an embodiment of the present invention.
제3도는 본 발명의 일 실시예에 의한 반도체 패키지를 나타내는 개략도이다.3 is a schematic view showing a semiconductor package according to an embodiment of the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950037210A KR970024117A (en) | 1995-10-25 | 1995-10-25 | Semiconductor package and manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950037210A KR970024117A (en) | 1995-10-25 | 1995-10-25 | Semiconductor package and manufacturing method |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970024117A true KR970024117A (en) | 1997-05-30 |
Family
ID=66584525
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950037210A KR970024117A (en) | 1995-10-25 | 1995-10-25 | Semiconductor package and manufacturing method |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970024117A (en) |
-
1995
- 1995-10-25 KR KR1019950037210A patent/KR970024117A/en not_active Application Discontinuation
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |