KR970019698A - System Initiator in PDTV - Google Patents

System Initiator in PDTV Download PDF

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Publication number
KR970019698A
KR970019698A KR1019950033568A KR19950033568A KR970019698A KR 970019698 A KR970019698 A KR 970019698A KR 1019950033568 A KR1019950033568 A KR 1019950033568A KR 19950033568 A KR19950033568 A KR 19950033568A KR 970019698 A KR970019698 A KR 970019698A
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KR
South Korea
Prior art keywords
pdp
clock
clear pulse
generating
signal
Prior art date
Application number
KR1019950033568A
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Korean (ko)
Other versions
KR0170943B1 (en
Inventor
박준석
Original Assignee
배순훈
대우전자 주식회사
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Application filed by 배순훈, 대우전자 주식회사 filed Critical 배순훈
Priority to KR1019950033568A priority Critical patent/KR0170943B1/en
Publication of KR970019698A publication Critical patent/KR970019698A/en
Application granted granted Critical
Publication of KR0170943B1 publication Critical patent/KR0170943B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/12—Picture reproducers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/63—Generation or supply of power specially adapted for television receivers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

본 발명은 피디피 티브이(PDP TV)에서의 시스템 초기화 장치에 관한 것으로, 디코더로부의 전원인가펄스에 의거하여 클럭 발생부로부터의 클럭이 카운터에서 계수되어, 설정된 소정시간 동안 카운터로부터 클리어펄스가 발생되어 A/D 변환부로 제공되고, 카운터로부터의 클리어펄스에 의거하여 PLL로부터 제공되는 샘플링클럭이 클리어된다. 그리고, 샘플링클럭 이후부터의 아날로그 복합영상신호와 RGB 신호가 A/D 변환부에서 디지털로 변환된 다음 데이터 처리부에서 데이터 처리된 다음 PDP TV 화면상으로 디스플레이되므로써, PDP 시스템에 전원이 인가되는 경우는 PLL로부터의 불안정한 샘플링클럭을 차단하므로, 복합영상신호와 RGB 신호의 불안정한 A/D변환으로 인해 불안정한 화상이 PDP TV 화면상으로 디스플레이되는 것을 사전에 방지할 수 있도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for initializing a system in a PDP TV, wherein a clock from a clock generator is counted in a counter based on a power-on pulse from a decoder, and a clear pulse is generated from a counter for a predetermined time. The sampling clock provided to the A / D conversion section and provided from the PLL is cleared based on the clear pulse from the counter. When the analog composite video signal and the RGB signal after the sampling clock are digitally converted by the A / D converter, then processed by the data processor, and then displayed on the PDP TV screen, the power is applied to the PDP system. By blocking the unstable sampling clock from the PLL, it is possible to prevent the unstable image from being displayed on the PDP TV screen due to unstable A / D conversion of the composite video signal and the RGB signal.

Description

피디피 티브이(PDP TV)에서의 시스템 초기화장치System Initiator in PDTV

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 바람직한 실시예에 따른 피디피 티브이(PDP TV)에서의 시스템 초기화장치의 개략적인 블록 구성도,1 is a schematic block diagram of an apparatus for initializing a system in a PDP TV according to a preferred embodiment of the present invention;

제2A,B도는 본 발명에 따라 시스템 초기화시에 제1도의 카운터로분터 출력되는 펄스를 도시한 도면.2A and 2B show pulses output to the counter of FIG. 1 upon system initialization in accordance with the present invention.

Claims (2)

전원이 인가되면 시스템을 초기화하는 PDP TV 시스템에 있어서, 외부로부터의 조작에 의거하여 전원이 인가되면 그에 상응하는 전원인가펄스를 발생하는 디코더(110); 상기 디코더(110)로부터의 전원인가 펼스에 의거하여 설정된 소정시간 동안 A/D 변환을 클리어하기 위한 클리어펄스를 발생하는 클리어펄스 발생수단(120,130);PLL로부터의 샘플링클럭에 의거하여 아날로그의 복합영상신호와 RGB 신호를 디지털신호로 변환하는 중에 상기 클리어펄스 발생수단(120, 130)으로부터 클리어펄스가 제공되는 동안 상기 복합영상신호와 RGB 신호의 디지털변환을 중단하는 A/D 변환수단(140); 상기 A/D 변환수단(140)에서 디지털변환된 상기 복합영상신호와 RGB 신호를 데이터 처리한 다음 상기 PDP TV 화면상으로 디스플레이하기 위한 데이타 처리수단(150)으로 이루어진 것을 특징으로 하는 피디피 티브이(PDP TV)에서의 시스템 초기화장치.A PDP TV system for initializing a system when power is applied, the PDP TV system comprising: a decoder (110) for generating a corresponding power supply pulse when power is applied based on an external operation; Clear pulse generating means (120,130) for generating a clear pulse for clearing the A / D conversion for a predetermined time set based on the power-up spread from the decoder (110); analog composite video based on the sampling clock from the PLL A / D conversion means (140) for stopping the digital conversion of the composite video signal and the RGB signal while the clear pulse is provided from the clear pulse generating means (120, 130) while converting the signal and the RGB signal into a digital signal; PDP (PDP) characterized in that the data processing means for processing the composite video signal and the RGB signal digitally converted by the A / D conversion means 140 and then displayed on the PDP TV screen System initializer on TV). 제1항에 있어서, 상기 클리어펄스 발생수단은; 설정된 소정주기를 갖는 클럭을 발생하는 클럭발생수단; 상기 클럭 발생수단에서 발생되는 상기 소정주기를 갖는 클럭을 계수하여 상기 설정된 소정시간 동안 상기 클리어펄스를 발생하는 카운터로 이루어진 것을 특징으로 하는 피디피 티브이(PDP TV)에서의 시스템 초기화장치.According to claim 1, The clear pulse generating means; Clock generation means for generating a clock having a predetermined period; And a counter for counting a clock having the predetermined period generated by the clock generating means and generating the clear pulse for the predetermined predetermined time period. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950033568A 1995-09-30 1995-09-30 The system initializing apparatus for pdp tv KR0170943B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950033568A KR0170943B1 (en) 1995-09-30 1995-09-30 The system initializing apparatus for pdp tv

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950033568A KR0170943B1 (en) 1995-09-30 1995-09-30 The system initializing apparatus for pdp tv

Publications (2)

Publication Number Publication Date
KR970019698A true KR970019698A (en) 1997-04-30
KR0170943B1 KR0170943B1 (en) 1999-03-20

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KR1019950033568A KR0170943B1 (en) 1995-09-30 1995-09-30 The system initializing apparatus for pdp tv

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100416850B1 (en) * 1997-02-18 2004-03-26 주식회사 대우일렉트로닉스 A processing apparatus of system initial state for plasma display panel television

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100416850B1 (en) * 1997-02-18 2004-03-26 주식회사 대우일렉트로닉스 A processing apparatus of system initial state for plasma display panel television

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Publication number Publication date
KR0170943B1 (en) 1999-03-20

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