KR970019683A - Video signal muting device during channel switching in PDTV - Google Patents
Video signal muting device during channel switching in PDTV Download PDFInfo
- Publication number
- KR970019683A KR970019683A KR1019950033560A KR19950033560A KR970019683A KR 970019683 A KR970019683 A KR 970019683A KR 1019950033560 A KR1019950033560 A KR 1019950033560A KR 19950033560 A KR19950033560 A KR 19950033560A KR 970019683 A KR970019683 A KR 970019683A
- Authority
- KR
- South Korea
- Prior art keywords
- signal
- mute
- generating
- composite video
- absence
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/08—Separation of synchronising signals from picture signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/50—Tuning indicators; Automatic tuning control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/50—Tuning indicators; Automatic tuning control
- H04N5/505—Invisible or silent tuning
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Synchronizing For Television (AREA)
- Transforming Electric Information Into Light Information (AREA)
Abstract
본 발명은 피디피 티브이(PDP TV)에서의 채널전환시 영상신호 뮤트장치에 관한 것으로, 복합영상싱호가 유신호이면 동기분리부에서 분리된 수평동기신호(H1)와 수직동기신호(V1)에 의거하여 유무신호 판별부로부터 로우레벨신호가 출력되고, 유무신호 판별부로부터의 로우레벨신호에 의거하여 제2뮤트신호 발생부는 클리어되는 동시에 스위칭부의 가변단자(A)와 고정단자(C)가 접속되며, 유무신호 판별부로부터 출력되는 로우레벨신호가 인버터를 통해 하이레벨신호로 반전된 다음 제 1AND 게이트의 일측입력단으로 입력된다. 이때, 동기분부에서 분리된 수평동기신호(HS)가 제1 AND 게이트의 타측입력단으로 입력되어 논리곱된 다음 제1뮤트신호 발생부로 제공되고, 제1뮤트신호 발생부로부터 첫 번째 수평동기신호의 플링에지부터 영상신호가 안정되기까지의 소정의 수평동기신호 동안 뮤트신호가 발생되어 스위칭부터 가변단자(A)와 고정단자 (C)를 통해 출력된다. 한편, 복합영상신호가 무신호이면 유무신호 판별부로부터 하이레벨신호가 출력되어 제(2)AND 게이트의 일측일력단으로 제공되고, 동기발생부에서 발생된 수평동기펄스가 제 2AND 게이트의 타측입력단으로 입력되어 제2AND 게이트를 통해 논리곱된다음 제2뮤트신호 발생부로 제공되며, 제2뮤트신호 발생부로부터 첫 번째 수평동기펄스의 폴링에지부터 영상신호가 안정되기까지의 소정의 수평동기펄스 동안 뮤트신호가 발생된다. 이때, 유무신호 판별부로부터의 하이레벨신호가 인버터를 통해 로우레벨신호로 반전되고, 이로우레벨신호에 의거하여 제1뮤트신호 발생부가 클리어되는 동시에 스위칭부의 가변단자(B)와 고정단자(C)가 접속되므로, 제2뮤트신호 발생부에서 발생된 뮤트신호가 스위칭부의 가변단자(B)와 고정단자(C)를 통해 출력되므로, 복합영상신호가 유신호에서 무신호 또는 무신호에서 유신호로 전환되는 경우, 전환된 채널에 대한 복합영상신호가 안정될 때까지 뮤트신호가 각각 발생되어 전환된 채널의 복합영상신호가 소정시간 동안 뮤트되므로, 안정된 복합영상신호를 PDP TV 화면상으로 디스플레이 할 수 있도록 한 것이다.The present invention relates to a video signal muting device when switching channels in a PDP TV. If the composite video signal is a valid signal, the present invention relates to a horizontal synchronous signal H 1 and a vertical synchronous signal V 1 separated by a synchronization separator. The low level signal is output from the presence / absence signal discrimination unit, and the second mute signal generator is cleared based on the low level signal from the presence / absence signal discrimination unit, and the variable terminal A and the fixed terminal C are connected to the switching unit. The low level signal output from the presence / absence signal determination unit is inverted into a high level signal through an inverter and then input to one input terminal of the first AND gate. At this time, the horizontal synchronization signal H S separated from the synchronization part is input to the other input terminal of the first AND gate, and is then multiplied and provided to the first mute signal generator, and the first horizontal synchronization signal from the first mute signal generator. The mute signal is generated during the predetermined horizontal synchronizing signal from the fling edge to the image signal is stabilized, and is output through the variable terminal (A) and the fixed terminal (C) from switching. On the other hand, if the composite video signal is no signal, a high level signal is output from the presence / absence signal discrimination unit to be provided to one side power stage of the second AND gate, and the horizontal synchronization pulse generated from the synchronization generator is the other input end of the second AND gate. Is inputted to the second mute signal generator and supplied to the second mute signal generator for a predetermined horizontal synchronous pulse from the falling edge of the first horizontal synchronous pulse to the stable image signal. A mute signal is generated. At this time, the high level signal from the presence / absence signal determination unit is inverted into a low level signal through the inverter, and the first mute signal generation unit is cleared based on the low level signal, and the variable terminal B and the fixed terminal C of the switching unit are cleared. Since the mute signal generated by the second mute signal generator is output through the variable terminal (B) and the fixed terminal (C) of the switching unit, the composite video signal is switched from the non-signal or no signal to a non-signal When the composite video signal for the switched channel is stabilized, the mute signals are generated, respectively, and the composite video signal of the switched channel is muted for a predetermined time, so that the stable composite video signal can be displayed on the PDP TV screen. It is.
Description
제1도는 본 발명의 바람직한 실시예에 따른 피디피 티브이(PDP TV)에서의 채널전환시 영상신호 뮤트장치의 개략적인 블록구성도.1 is a schematic block diagram of an apparatus for muting video signal during channel switching in a PDP TV according to a preferred embodiment of the present invention.
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950033560A KR100197381B1 (en) | 1995-09-30 | 1995-09-30 | Apparatus for muting the video digital in pdp in tv |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950033560A KR100197381B1 (en) | 1995-09-30 | 1995-09-30 | Apparatus for muting the video digital in pdp in tv |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970019683A true KR970019683A (en) | 1997-04-30 |
KR100197381B1 KR100197381B1 (en) | 1999-06-15 |
Family
ID=19428968
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950033560A KR100197381B1 (en) | 1995-09-30 | 1995-09-30 | Apparatus for muting the video digital in pdp in tv |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100197381B1 (en) |
-
1995
- 1995-09-30 KR KR1019950033560A patent/KR100197381B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR100197381B1 (en) | 1999-06-15 |
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