KR970018236A - Method for manufacturing metal wiring of semiconductor device - Google Patents

Method for manufacturing metal wiring of semiconductor device Download PDF

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Publication number
KR970018236A
KR970018236A KR1019950032993A KR19950032993A KR970018236A KR 970018236 A KR970018236 A KR 970018236A KR 1019950032993 A KR1019950032993 A KR 1019950032993A KR 19950032993 A KR19950032993 A KR 19950032993A KR 970018236 A KR970018236 A KR 970018236A
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KR
South Korea
Prior art keywords
metal wiring
wiring layer
plasma
semiconductor device
forming
Prior art date
Application number
KR1019950032993A
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Korean (ko)
Inventor
박지순
최길현
정우상
김병준
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950032993A priority Critical patent/KR970018236A/en
Publication of KR970018236A publication Critical patent/KR970018236A/en

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Abstract

금속배선층의 포토리소그래피 공정시 발생하는 금속배선층의 손상을 방지하여 신뢰도가 향상된 금속배선을 제조하는 방법에 관해 개시한다. 본 발명은 반도체 장치의 금속배선 형성방법에 있어서, 반도체 기판위에 금속 배선층을 형성하는 단계와 상기 금속배선층을 산화성 플라즈마에 노출시키는 단계를 구비하는 것을 특징으로 하는 반도체 장치의 금속배선 형성방법을 제공한다.A method of manufacturing a metal wiring having improved reliability by preventing damage to the metal wiring layer generated during a photolithography process of the metal wiring layer is disclosed. The present invention provides a method for forming a metal wiring in a semiconductor device, the method comprising forming a metal wiring layer on a semiconductor substrate and exposing the metal wiring layer to an oxidizing plasma. .

본 발명에 의하면 금속배선층 표면의 불완전한 원자결합을 안정화시킴과 동시에 표면을 산화시켜 줌으로써 포토리소그래피 공정시 현상액으로 사용하는 화학물질에 의한 표면 손상이 방지되어 신뢰도 높은 반도체장치를 제조할 수 있게 된다.According to the present invention, by stabilizing incomplete atomic bonds on the surface of the metallization layer and oxidizing the surface, surface damage by chemicals used as a developer in the photolithography process can be prevented, and thus a highly reliable semiconductor device can be manufactured.

Description

반도체 장치의 금속배선 제조방법Method for manufacturing metal wiring of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제6도 내지 제11도는 본 발명의 일실시예에 의한 금속배선층의 제조방법을 나타내는 단면도들이다.6 to 11 are cross-sectional views illustrating a method of manufacturing a metallization layer according to an embodiment of the present invention.

Claims (8)

반도체 장치의 금속배선 형성방법에 있어서, 반도체 기판위에 금속배선층을 형성하는 단계; 상기 금속배선층을 산화성 플라즈마에 노출시키는 단계를 구비하는 것을 특징으로 하는 반도체 장치의 금속배선 형성방법.CLAIMS What is claimed is: 1. A method of forming metal wirings in a semiconductor device, comprising: forming a metal wiring layer on a semiconductor substrate; And exposing the metallization layer to an oxidative plasma. 제1항에 있어서, 상기 산화성 플라즈마는 O2플라즈마임을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, wherein the oxidative plasma is an O 2 plasma. 제1항에 있어서, 상기 산화성 플라즈마는 O2가 함유된 혼합가스로부터 생성된 플라즈마임을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, wherein the oxidative plasma is a plasma generated from a mixed gas containing O 2 . 제1항에 있어서, 상기 산화성 플라즈마의 처리단계는 상기 금속배선층의 형성공정과 인사이투(in-situ)로 수행됨을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, wherein the treating of the oxidizing plasma is performed by forming the metal wiring layer and in-situ. 제1항에 있어서, 상기 산화성 플라즈마 처리단계전에 상기 금속배선층의 플로우(flow)단계를 더 구비하는 것을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, further comprising a flow step of the metal wiring layer before the oxidative plasma processing step. 제1항에 있어서, 상기 산화성 플라즈마에 노출시키는 단계는 400℃이하에서 수행함을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, wherein the exposing to the oxidizing plasma is performed at 400 ° C. or less. 제1항에 있어서, 상기 산화성 플라즈마는 500W 이하의 RF전력에서 형성함을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, wherein the oxidative plasma is formed at an RF power of 500 W or less. 제1항에 있어서, 상기 금속배선층은 알루미늄(Al)을 이용하여 형성하는 것을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, wherein the metal wiring layer is formed using aluminum (Al). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950032993A 1995-09-29 1995-09-29 Method for manufacturing metal wiring of semiconductor device KR970018236A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950032993A KR970018236A (en) 1995-09-29 1995-09-29 Method for manufacturing metal wiring of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950032993A KR970018236A (en) 1995-09-29 1995-09-29 Method for manufacturing metal wiring of semiconductor device

Publications (1)

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KR970018236A true KR970018236A (en) 1997-04-30

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KR1019950032993A KR970018236A (en) 1995-09-29 1995-09-29 Method for manufacturing metal wiring of semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010066601A (en) * 1999-12-31 2001-07-11 황인길 Wiring manufacturing method for semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010066601A (en) * 1999-12-31 2001-07-11 황인길 Wiring manufacturing method for semiconductor device

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