KR970018177A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR970018177A
KR970018177A KR1019950029208A KR19950029208A KR970018177A KR 970018177 A KR970018177 A KR 970018177A KR 1019950029208 A KR1019950029208 A KR 1019950029208A KR 19950029208 A KR19950029208 A KR 19950029208A KR 970018177 A KR970018177 A KR 970018177A
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KR
South Korea
Prior art keywords
polysilicon
polysilicon layer
substrate
entire surface
semiconductor device
Prior art date
Application number
KR1019950029208A
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Korean (ko)
Inventor
오경택
Original Assignee
문정환
Lg 반도체 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, Lg 반도체 주식회사 filed Critical 문정환
Priority to KR1019950029208A priority Critical patent/KR970018177A/en
Publication of KR970018177A publication Critical patent/KR970018177A/en

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Abstract

본 발명은 반도체장치의 제조방법에 관한 것으로, 폴리실리콘 식각시 발생하는 폴리 스트링거를 제거하기 위한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and to remove poly stringers generated during polysilicon etching.

본 발명은 기판상에 폴리실리콘을 증착하는 공정과, 상기 폴리실리콘층을 패터닝하여 제1폴리실리콘층을 형성하는 공정, 기판 전면에 TEOS막을 형성하는 공정, 상기 TEOS막을 전면식각하여 평탄화시키는 공정,상기 TEOS막을 선택적으로 식각하여 상기 제1폴리실리콘층을 노출시키는 콘택홀을 형성하는 공정, 기판 전면에 폴리실리콘을 증착하는 공정, 및 상기 폴리실리콘을 패터닝하여 제2폴리실리콘층을 형성하는 공정을 포함하여 이루어지는 반도체장치의 제조방법을 제공한다.The present invention provides a process for depositing polysilicon on a substrate, forming a first polysilicon layer by patterning the polysilicon layer, forming a TEOS film on the entire surface of the substrate, and planarizing the entire surface of the TEOS film by etching. Selectively etching the TEOS film to form a contact hole exposing the first polysilicon layer, depositing polysilicon on the entire surface of the substrate, and forming a second polysilicon layer by patterning the polysilicon. It provides a method for manufacturing a semiconductor device comprising.

Description

반도체장치의 제조방법Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의한 2층 폴리실리콘 배선구조의 반도체소자 제조방법을 도시한 공정순서도.2 is a process flowchart showing a semiconductor device manufacturing method of a two-layer polysilicon wiring structure according to the present invention.

Claims (4)

단차가 있는 기판상에 절연막을 형성하는 공정과, 상기 절연막을 전면 식각하여 평탄화시키는 공정, 상기 평탄화된 절연막상에 폴리실리콘을 증착하는 공정, 상기 폴리실리콘층을 소정패턴으로 패터닝하는 공정을 포함하는 것을 특징으로 하는 반도체장치의 제조방법.Forming an insulating film on the stepped substrate, etching the entire insulating film to planarization, depositing polysilicon on the planarized insulating film, and patterning the polysilicon layer in a predetermined pattern. A method of manufacturing a semiconductor device, characterized in that. 제1항에 있어서, 상기 절연막은 TEOS임을 특징으로 하는 반도체장치의 제조방법.The method of claim 1, wherein the insulating film is TEOS. 제1항에 있어서, 상기 절연막은 이중산화막 또는 SOG임을 특징으로 하는 반도체장치의 제조방법.The method of claim 1, wherein the insulating film is a double oxide film or SOG. 기판상에 폴리실리콘을 증착하는 공정과, 상기 폴리실리콘층을 패터닝하여 제1폴리실리콘층을 형성하는 공정, 기판 전면에 TEOS막을 형성하는 공정, 상기 TEOS막을 전면식각하여 평탄화시키는 공정, 상기 TEOS막을 선택적으로 식각하여 상기 제1폴리실리콘층을 노출시키는 콘택홀을 형성하는 공정, 기판 전면에 폴리실리콘을 증착하는 공정, 및 상기 폴리실리콘층을 패터닝하여 제2폴리실리콘층을 형성하는 공정을 포함하여 이루어지는 것을 특징으로 하는 반도체장치의 제조방법.Depositing polysilicon on a substrate, patterning the polysilicon layer to form a first polysilicon layer, forming a TEOS film on the entire surface of the substrate, etching the entire surface of the TEOS film, and flattening the TEOS film. Selectively etching to form a contact hole exposing the first polysilicon layer, depositing polysilicon on the entire surface of the substrate, and patterning the polysilicon layer to form a second polysilicon layer A method for manufacturing a semiconductor device, characterized by the above. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950029208A 1995-09-06 1995-09-06 Manufacturing Method of Semiconductor Device KR970018177A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950029208A KR970018177A (en) 1995-09-06 1995-09-06 Manufacturing Method of Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950029208A KR970018177A (en) 1995-09-06 1995-09-06 Manufacturing Method of Semiconductor Device

Publications (1)

Publication Number Publication Date
KR970018177A true KR970018177A (en) 1997-04-30

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950029208A KR970018177A (en) 1995-09-06 1995-09-06 Manufacturing Method of Semiconductor Device

Country Status (1)

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KR (1) KR970018177A (en)

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