KR970018149A - Fine Pattern Formation Method of Semiconductor Device - Google Patents

Fine Pattern Formation Method of Semiconductor Device Download PDF

Info

Publication number
KR970018149A
KR970018149A KR1019950031811A KR19950031811A KR970018149A KR 970018149 A KR970018149 A KR 970018149A KR 1019950031811 A KR1019950031811 A KR 1019950031811A KR 19950031811 A KR19950031811 A KR 19950031811A KR 970018149 A KR970018149 A KR 970018149A
Authority
KR
South Korea
Prior art keywords
film
semiconductor device
patterned
conductive film
adjusting
Prior art date
Application number
KR1019950031811A
Other languages
Korean (ko)
Inventor
최성길
이주성
한민석
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950031811A priority Critical patent/KR970018149A/en
Publication of KR970018149A publication Critical patent/KR970018149A/en

Links

Landscapes

  • Drying Of Semiconductors (AREA)

Abstract

본 발명은 고온산화막과 폴리실리콘막의 증착두께에 따라 CD를 자유로이 조절할 수 있는 반도체 장치의 미세패턴 형성방법에 관한 것으로서, 반도체 기판상에 패터닝될 막을 형성하는 공정과, 패터닝될 막상에 CD 조절용 절연막과 도전막을 순차 형성하는 공정과, CD 조절용 도전막상에 감광막을 도포하고, 패터닝하는 공정과, 패터닝된 감광막을 마스크로 하여 CD 조절용 도전막과 감광막을 순차 슬로프 에칭하는 공정과, 감광막과 CD 조절용 도전막을 순차 제거하는 공정과, CD 조절용 도전막을 마스크로 하여 그 하부의 패터닝될 막을 식각하여 소정의 패턴을 형성하는 공정을 포함한다.The present invention relates to a method of forming a fine pattern of a semiconductor device that can freely control a CD according to the deposition thickness of a high temperature oxide film and a polysilicon film, the method of forming a film to be patterned on a semiconductor substrate, an insulating film for CD control on a patterned film, A process of sequentially forming a conductive film, a process of applying and patterning a photosensitive film on the conductive film for CD control, a step of sequentially etching the conductive film and photosensitive film for CD control using the patterned photosensitive film as a mask, and a photosensitive film and a conductive film for CD control And a step of forming a predetermined pattern by etching the film to be patterned below using the CD adjusting conductive film as a mask.

Description

반도체장치의 미세패턴 형성방법Fine Pattern Formation Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도(A)∼(E)는 본 발명의 실시예에 따른 반도체 장치의 미세패턴 형성공정도.2A to 2E are process diagrams for forming a fine pattern of a semiconductor device according to an embodiment of the present invention.

Claims (6)

반도체 기판상에 패터닝될 막을 형성하는 공정과, 패터닝될 막상에 CD 조절용 절연막과 도전막을 순차 형성하는 공정과, CD조절용 도전막상에 감광막을 도포하고, 패터닝하는 공정과, 패터닝된 감광막을 마스크로 하여 CD 조절용 도전막과 감광막을 순차 슬로프 에칭하는 공정과, 감광막과 CD 조절용 도전막을 순차 제거 하는 공정과, CD 조절용 도전막을 마스크로 하여 그 하부의 패터닝될 막을 식각하여 소정의 패턴을 형성하는 공정을 포함하는 것을 특징으로 하는 반도체 장치의 미세패턴 형성방법.Forming a film to be patterned on a semiconductor substrate, sequentially forming a CD adjusting insulating film and a conductive film on the patterned film, applying a photosensitive film to the CD adjusting conductive film, and patterning the patterned photosensitive film as a mask A step of sequentially etching the CD adjusting conductive film and the photosensitive film, a step of sequentially removing the photosensitive film and the CD adjusting conductive film, and a step of etching a film to be patterned under the CD adjusting conductive film as a mask to form a predetermined pattern; A fine pattern forming method for a semiconductor device, characterized in that. 제1항에 있어서, 패터닝될 막은 폴리실리콘막인 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the film to be patterned is a polysilicon film. 제1항에 있어서, CD 조절용 도전막은 폴리실리콘막인 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the conductive film for CD adjustment is a polysilicon film. 제1항 및 제3항에 있어서, CD 조절용 도전막은 500Å 내지 3000Å의 두께로 증착되는 것을 특징으로 하는 반도체 장치의 제조방법.The semiconductor device manufacturing method according to claim 1 or 3, wherein the conductive film for adjusting CD is deposited to a thickness of 500 mW to 3000 mW. 제1항에 있어서, CD 조절용 절연막은 고온 산화막인 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the insulating film for CD adjustment is a high temperature oxide film. 제1항에 있어서, CD 조절용 절연막과 도전막을 CHF3, CF4, Ar 개스를 이용하여 슬로프 에칭하는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the CD adjusting insulating film and the conductive film are subjected to slope etching using CHF 3 , CF 4 , and Ar gas. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950031811A 1995-09-26 1995-09-26 Fine Pattern Formation Method of Semiconductor Device KR970018149A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950031811A KR970018149A (en) 1995-09-26 1995-09-26 Fine Pattern Formation Method of Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950031811A KR970018149A (en) 1995-09-26 1995-09-26 Fine Pattern Formation Method of Semiconductor Device

Publications (1)

Publication Number Publication Date
KR970018149A true KR970018149A (en) 1997-04-30

Family

ID=66615900

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950031811A KR970018149A (en) 1995-09-26 1995-09-26 Fine Pattern Formation Method of Semiconductor Device

Country Status (1)

Country Link
KR (1) KR970018149A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100484879B1 (en) * 2002-09-05 2005-04-22 동부아남반도체 주식회사 Method for forming a floating gate in a semiconductor flash cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100484879B1 (en) * 2002-09-05 2005-04-22 동부아남반도체 주식회사 Method for forming a floating gate in a semiconductor flash cell

Similar Documents

Publication Publication Date Title
KR970051945A (en) Manufacturing Method of Semiconductor Device
KR970018149A (en) Fine Pattern Formation Method of Semiconductor Device
KR19980058452A (en) Manufacturing method of semiconductor device
KR940004750A (en) Contact manufacturing method using spin on class (SOG) film
KR940015698A (en) Fine photoresist pattern formation method
KR960005555B1 (en) Semiconductor device isolation method
KR970013046A (en) Manufacturing Method of Semiconductor Device
KR970052274A (en) Method for forming fine contact and conductive line in semiconductor device
KR970018049A (en) Micro pattern formation method using auxiliary pattern method
KR970053021A (en) Method of forming a semiconductor device
KR960005809A (en) Pattern formation method of semiconductor device
KR970054008A (en) Capacitor Manufacturing Method of Semiconductor Device
KR970052510A (en) Metal wiring formation method of semiconductor device
KR970030391A (en) A method of forming a fine pattern in a semiconductor device
KR940016629A (en) Three-layer photoresist pattern formation method
KR950015597A (en) Contact hole formation method of semiconductor device
KR950004408A (en) Polysilicon Pattern Formation Method of Semiconductor Device
KR950007100A (en) How to form self-aligned contacts
KR970018036A (en) Contact hole formation method of semiconductor device
KR950021079A (en) Manufacturing Method of Semiconductor Device
KR970052444A (en) Contact hole formation method of semiconductor device
KR940016508A (en) Method for manufacturing a contact of a semiconductor device having an inclined surface
KR970052372A (en) Metal wiring formation method of semiconductor device
KR970054601A (en) Metal layer patterning method in semiconductor device manufacturing process
KR970018747A (en) Capacitor Manufacturing Method of Semiconductor Device

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination