KR970018087A - Silicon treatment monitoring method - Google Patents

Silicon treatment monitoring method Download PDF

Info

Publication number
KR970018087A
KR970018087A KR1019950034013A KR19950034013A KR970018087A KR 970018087 A KR970018087 A KR 970018087A KR 1019950034013 A KR1019950034013 A KR 1019950034013A KR 19950034013 A KR19950034013 A KR 19950034013A KR 970018087 A KR970018087 A KR 970018087A
Authority
KR
South Korea
Prior art keywords
contact hole
monitoring method
substrate
silicon
etching
Prior art date
Application number
KR1019950034013A
Other languages
Korean (ko)
Other versions
KR0165448B1 (en
Inventor
심경보
김기상
임채신
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950034013A priority Critical patent/KR0165448B1/en
Publication of KR970018087A publication Critical patent/KR970018087A/en
Application granted granted Critical
Publication of KR0165448B1 publication Critical patent/KR0165448B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor

Abstract

신규한 실리콘처리 모니터링 방법이 개시되어 있다. 반도체기판상에 형성된 절연막을 식각하여, 상기 기판의 소정부위를 노출시키는 콘택홀을 형성한 후, 상기 콘택홀 식각공정에 의해 손상된 기판의 표면을 식각해내는 실리콘처리를 실시한다. 열파장(T. W) 값을 측정하여 상기 실리콘처리가 진행되었는지 또는 스팁되었는지를 모니터링한다. 웨이퍼 손실없이 종래의 웨이퍼 폐기 후, V.SEM을 확인하는 방법과 동일한 효과를 얻을 수 있다.A novel silicon processing monitoring method is disclosed. The insulating film formed on the semiconductor substrate is etched to form a contact hole exposing a predetermined portion of the substrate, followed by silicon processing for etching the surface of the substrate damaged by the contact hole etching process. The thermal wavelength (T. W) value is measured to monitor whether the silicon treatment has proceeded or is steeped. After discarding conventional wafers without wafer loss, the same effect as that of V.SEM verification can be obtained.

Description

실리콘처리 모니터링 방법Silicon treatment monitoring method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 및 제1B도는 실리콘처리의 유·무에 따른 결과를 나타내는 버티컬 SEM 사진들.1A and 1B are vertical SEM photographs showing the results of the presence or absence of silicon treatment.

Claims (1)

반도체기판 상에 형성된 절연막을 식각하여 상기 반도체기판의 소정부위를 노출시키는 콘택홀을 형성하는 단계; 상기 콘택홀 식각공정에 의해 손상된 기판의 표면을 식각해내는 실리콘처리를 실시하는 단계; 및 열파장값을 측정하여 상기 실리콘처리가 스킵되었는지를 모니터링하는 단계를 구비하는 것을 특징으로 하는 반도체장치의 제조방법.Etching the insulating film formed on the semiconductor substrate to form a contact hole exposing a predetermined portion of the semiconductor substrate; Performing a silicon process of etching the surface of the substrate damaged by the contact hole etching process; And monitoring whether the silicon processing has been skipped by measuring a thermal wavelength value. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950034013A 1995-09-30 1995-09-30 Method of silicon processing monitoring KR0165448B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950034013A KR0165448B1 (en) 1995-09-30 1995-09-30 Method of silicon processing monitoring

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950034013A KR0165448B1 (en) 1995-09-30 1995-09-30 Method of silicon processing monitoring

Publications (2)

Publication Number Publication Date
KR970018087A true KR970018087A (en) 1997-04-30
KR0165448B1 KR0165448B1 (en) 1999-02-01

Family

ID=19429272

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950034013A KR0165448B1 (en) 1995-09-30 1995-09-30 Method of silicon processing monitoring

Country Status (1)

Country Link
KR (1) KR0165448B1 (en)

Also Published As

Publication number Publication date
KR0165448B1 (en) 1999-02-01

Similar Documents

Publication Publication Date Title
KR890012402A (en) Manufacturing Method of Semiconductor Device
TW374203B (en) A method for forming a fine contact hole in a semiconductor device
KR970018087A (en) Silicon treatment monitoring method
KR980006032A (en) Method of forming an isolation region of a semiconductor device
KR970053379A (en) Method of forming device isolation region
KR950019933A (en) Manufacturing method of semiconductor device
KR950021389A (en) Field oxide film formation method of a semiconductor device
KR970003656A (en) Method for forming field oxide film of semiconductor device
KR880013236A (en) Manufacturing Method of Semiconductor Device
KR970003560A (en) Manufacturing method of semiconductor device
KR960026165A (en) Semiconductor Device Contact Hole Formation Method
KR930020722A (en) Manufacturing Method of Semiconductor Device
KR970023714A (en) Contact portion of semiconductor device and forming method thereof
KR960026579A (en) Field oxide film formation method of semiconductor device
KR960019530A (en) Align target formation method of semiconductor device
KR950025953A (en) Method of forming device isolation film of semiconductor device
KR970018080A (en) Contact Forming Method of Semiconductor Device
KR920013625A (en) Ion Implantation Method of Semiconductor Device
KR910013511A (en) Device isolation oxide film formation method of semiconductor device
KR980005551A (en) Method of forming a contact hole in a semiconductor device
KR920013600A (en) Method of forming planar isolation region of semiconductor device
KR970052785A (en) Semiconductor device manufacturing method
KR970003937A (en) Method of manufacturing metal oxide silicon field effect transistor
KR950034517A (en) Method of forming conductive line in semiconductor device
KR950034671A (en) Separation zone formation method by high temperature heat treatment in nitrogen atmosphere

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20050802

Year of fee payment: 8

LAPS Lapse due to unpaid annual fee