KR970010099B1 - Variable length decoding circuit - Google Patents

Variable length decoding circuit Download PDF

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Publication number
KR970010099B1
KR970010099B1 KR94015369A KR19940015369A KR970010099B1 KR 970010099 B1 KR970010099 B1 KR 970010099B1 KR 94015369 A KR94015369 A KR 94015369A KR 19940015369 A KR19940015369 A KR 19940015369A KR 970010099 B1 KR970010099 B1 KR 970010099B1
Authority
KR
South Korea
Prior art keywords
latch
code length
header information
code
outputs
Prior art date
Application number
KR94015369A
Other languages
Korean (ko)
Other versions
KR960003417A (en
Inventor
Young-Suk Sonn
Original Assignee
Daewoo Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daewoo Electronics Co Ltd filed Critical Daewoo Electronics Co Ltd
Priority to KR94015369A priority Critical patent/KR970010099B1/en
Publication of KR960003417A publication Critical patent/KR960003417A/en
Application granted granted Critical
Publication of KR970010099B1 publication Critical patent/KR970010099B1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/90Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
    • H04N19/91Entropy coding, e.g. variable length coding [VLC] or arithmetic coding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/46Embedding additional information in the video signal during the compression process

Abstract

The variable length decoding circuit is comprised of a first table consisting of PLA structure stores a header information only and, upon 16-bit data being applied from a multiplexer(22), outputs the corresponding code and code length of the header information; the output header information is transmitted to a second table(25), the code length is transmitted to a rotator(24) and a latch(26); the rotator(24) outputs a word of a transformation code consisting of a run and level corresponding to the header information in unit of half clock; the latch(26) is synchronized to a rising edge of a clock signal to latch a code length data, the latched data is transmitted to a barrel shifter(21) and an adder(27); the adder(27) adds the code length upon falling of the clock signal provided from the latch(26) and the code length upon rising of the clock signal provided from the first table(23), then outputs the result to a data transmission processing part(11).
KR94015369A 1994-06-30 1994-06-30 Variable length decoding circuit KR970010099B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR94015369A KR970010099B1 (en) 1994-06-30 1994-06-30 Variable length decoding circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR94015369A KR970010099B1 (en) 1994-06-30 1994-06-30 Variable length decoding circuit

Publications (2)

Publication Number Publication Date
KR960003417A KR960003417A (en) 1996-01-26
KR970010099B1 true KR970010099B1 (en) 1997-06-21

Family

ID=19386784

Family Applications (1)

Application Number Title Priority Date Filing Date
KR94015369A KR970010099B1 (en) 1994-06-30 1994-06-30 Variable length decoding circuit

Country Status (1)

Country Link
KR (1) KR970010099B1 (en)

Also Published As

Publication number Publication date
KR960003417A (en) 1996-01-26

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