KR970009493A - RF Module Forming Method by Ball Grid Array Package - Google Patents

RF Module Forming Method by Ball Grid Array Package Download PDF

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Publication number
KR970009493A
KR970009493A KR1019950020321A KR19950020321A KR970009493A KR 970009493 A KR970009493 A KR 970009493A KR 1019950020321 A KR1019950020321 A KR 1019950020321A KR 19950020321 A KR19950020321 A KR 19950020321A KR 970009493 A KR970009493 A KR 970009493A
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KR
South Korea
Prior art keywords
grid array
ball grid
substrate
solder
forming
Prior art date
Application number
KR1019950020321A
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Korean (ko)
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KR0149753B1 (en
Inventor
우준환
Original Assignee
정장호
Lg 정보통신주식회사
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Application filed by 정장호, Lg 정보통신주식회사 filed Critical 정장호
Priority to KR1019950020321A priority Critical patent/KR0149753B1/en
Publication of KR970009493A publication Critical patent/KR970009493A/en
Application granted granted Critical
Publication of KR0149753B1 publication Critical patent/KR0149753B1/en

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

본 발명은 볼 그리드 어레이 패키지에 의한 RF 모듈 형성 방법에 관한 것으로, 기판(3)에 실장되는 칩의 단자 위치의 상하면을 관통하는 관통 홀을 천공하는 단계(21,22)와, 상기 기판(3)의 상하면을 연결하는 전도선(4)을 상기 관통 홀에 형성하는 단계(23,25)와, 상기 기판(3)의 상면에 에멀션 메쉬를 이용하여 상기 전도선(4) 상에 볼 그리그 어레이 패드(7)부분을 제외한 절연체(2)로 코팅하는 단계(24,26)와, 메탈 메쉬(1)를 이용하여 상기 볼 그리드 어레이 패드(7) 상면에 소정 크기의 개구를 갖는 스텐실 마스크를 사용하여 상기 볼 그리드 어레이 패드(7)에 솔더 페이스트(5)를 인쇄하는 단계(27)와, 상기 인쇄된 솔더(5)를 질소 분위기에서 리플로우 솔더링을 통하여 볼 그리드 어레이 솔더볼(6)을 형성하는 단계(29)로 이루어져, 제조 원가의 감소와, 솔더 브리지에 따른 불량을 방지하는 효과를 제공한다.The present invention relates to a method for forming an RF module using a ball grid array package, comprising: drilling through holes penetrating through upper and lower surfaces of a terminal position of a chip mounted on a substrate 3 (21, 22), and the substrate (3). (23, 25) forming a conductive line (4) connecting the upper and lower surfaces of the through hole in the through hole, and the ball grease on the conductive line (4) using an emulsion mesh on the upper surface of the substrate (3) Coating steps 24 and 26 with the insulator 2 excluding the portion of the array pad 7, and using a metal mesh 1, a stencil mask having an opening having a predetermined size is formed on the top surface of the ball grid array pad 7. Printing 27 the solder paste 5 onto the ball grid array pad 7 using the same, and forming the ball grid array solder balls 6 through reflow soldering of the printed solder 5 in a nitrogen atmosphere. Step (29) to reduce manufacturing costs and solder bridge It provides an effect of preventing other defects.

Description

볼 그리드 어레이 패키지에 의한 RF 모듈 형성 방법RF Module Forming Method by Ball Grid Array Package

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 볼 그리드 어레이 패키지에 의한 RF 모듈 형성 방법에 대한 공정 순서도, 제3도 (가)는 본 발명에 따른 볼 그리드 어레이 패키지에 의한 RF 모듈 형성 방법이 적용된 일 실시예의 제작 공정 중 솔더 프린팅 단계까지의 상태 단면도.2 is a process flowchart of a method for forming an RF module using the ball grid array package according to the present invention, and FIG. 3 (a) is a manufacturing process of an embodiment to which an RF module forming method using the ball grid array package according to the present invention is applied. Sectional view of up to solder printing stage.

Claims (6)

기판(3)에 실장되는 칩의 단자 위치의 상하면을 관통하는 관통 홀을 천공하는 단계(21,22)와, 상기 기판(3)의 상하면을 연결하는 전도선(4)을 상기 관통 홀에 형성하는 단계(23,25)와, 상기 기판(3) 상면에 에멀션 메쉬를 이용하여 상기 전도선(4) 상에 볼 그리드 어레이 패드(7) 부분에 제외한 절연체(2)로 코팅하는 단계(24,26)와, 메탈메쉬(1)를 이용하여 상기 볼 그리드 어레이 패드(7) 상면에 소정 크기의 개구를 갖는 스텐실 마스크를 사용하여 상기 볼그리드 어레이 패드(7)에 솔더 페이스트(5)를 인쇄하는 단계(27)와, 상기 인쇄된 솔더(5)를 질소 분위기에서 리플로우 솔더링을 통하여 볼 그리드 어레이 솔더 볼(6)을 형성하는 단계(29)로 이루어지는 것을 특징으로 하는 볼 그리드 어레이 패키지에 의한 RF 모듈 형성 방법.Forming through-holes (21, 22) through the upper and lower surfaces of the terminal position of the chip mounted on the substrate (3), and conducting wires (4) connecting the upper and lower surfaces of the substrate (3). Steps 23 and 25 and coating the insulator 2 except for the ball grid array pad 7 on the conductive line 4 using an emulsion mesh on the upper surface of the substrate 3 (24, 26) and a solder paste 5 is printed on the ball grid array pad 7 using a metal mesh 1 using a stencil mask having an opening of a predetermined size on the top surface of the ball grid array pad 7. RF by a ball grid array package, characterized in that step 27, and forming the ball grid array solder balls 6 through reflow soldering the printed solder 5 in a nitrogen atmosphere. Module formation method. 제1항에 있어서, 상기 기판(3)은 알루미나 세라믹으로 된 것을 특징으로 하는 볼 그리드 어레이 패키지에의한 RF 모듈 형성 방법.Method according to claim 1, characterized in that the substrate (3) is made of alumina ceramics. 제1항에 있어서, 상기 전도선(4)은 전기 도금에 의한 박막 패턴 제너레이션에 의해 형성되는 것을 특징으로 하는 볼 그리드 어레이 패키지에 의한 RF 모듈 형성 방법.The method according to claim 1, wherein the conductive lines (4) are formed by thin film pattern generation by electroplating. 제1항에 있어서, 상기 전도선(4)은 전도성 페이스트를 사용한 후막 패턴 제너레이션에 의해 형성되는 것을특징으로 하는 볼 그리드 어레이 패키지에 의한 RF 모듈 형성 방법.The method according to claim 1, wherein the conductive lines (4) are formed by thick film pattern generation using a conductive paste. 제1항에 있어서, 상기 스텐실 마스크의 솔더 페이스트를 인쇄하기 위한 개구는 상기 에멀션 메쉬에 의한볼 그리드 어레이 패드(7)의 개구 직경보다 상대적으로 더 크게 형성함을 특징으로 하는 볼 그리드 어레이 패키지에 의한RF 모듈 형성 방법.2. The ball grid array package according to claim 1, wherein the opening for printing the solder paste of the stencil mask is formed relatively larger than the opening diameter of the ball grid array pad 7 by the emulsion mesh. How to form an RF module. 제1항에 있어서, 상기 절연체(2)의 코팅은 스크린 프린팅 방법에 의해 이루어지는 것을 특징으로 하는 볼그리드 어레이 패키지에 의한 RF 모듈 형성 방법.Method according to claim 1, characterized in that the coating of the insulator (2) is carried out by a screen printing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950020321A 1995-07-11 1995-07-11 Rf module manufacturing method using ball grid array package KR0149753B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950020321A KR0149753B1 (en) 1995-07-11 1995-07-11 Rf module manufacturing method using ball grid array package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950020321A KR0149753B1 (en) 1995-07-11 1995-07-11 Rf module manufacturing method using ball grid array package

Publications (2)

Publication Number Publication Date
KR970009493A true KR970009493A (en) 1997-02-24
KR0149753B1 KR0149753B1 (en) 1998-12-15

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113437204A (en) * 2021-05-18 2021-09-24 深圳市隆利科技股份有限公司 Lamp panel preparation method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113437204A (en) * 2021-05-18 2021-09-24 深圳市隆利科技股份有限公司 Lamp panel preparation method

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Publication number Publication date
KR0149753B1 (en) 1998-12-15

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