KR970002367A - AC characteristic monitoring circuit of semiconductor device - Google Patents

AC characteristic monitoring circuit of semiconductor device Download PDF

Info

Publication number
KR970002367A
KR970002367A KR1019950018987A KR19950018987A KR970002367A KR 970002367 A KR970002367 A KR 970002367A KR 1019950018987 A KR1019950018987 A KR 1019950018987A KR 19950018987 A KR19950018987 A KR 19950018987A KR 970002367 A KR970002367 A KR 970002367A
Authority
KR
South Korea
Prior art keywords
semiconductor device
input
monitoring circuit
output
characteristic monitoring
Prior art date
Application number
KR1019950018987A
Other languages
Korean (ko)
Other versions
KR0163727B1 (en
Inventor
김헌준
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950018987A priority Critical patent/KR0163727B1/en
Publication of KR970002367A publication Critical patent/KR970002367A/en
Application granted granted Critical
Publication of KR0163727B1 publication Critical patent/KR0163727B1/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318328—Generation of test inputs, e.g. test vectors, patterns or sequences for delay tests

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

1. 청구 범위에 기재된 발명이 속한 기술분야1. TECHNICAL FIELD OF THE INVENTION

반도체 장치의 AC특성 감시회로에 관한 것으로, 특히 반도체장치의 칩상의 AC특성을 일괄적으로 분석, 평가하여 공정의 안정도를 분석할 수 있는 반도체장치의 AC특성 감시회로에 관한 것임.The present invention relates to an AC characteristic monitoring circuit of a semiconductor device, and more particularly, to an AC characteristic monitoring circuit of a semiconductor device capable of analyzing and evaluating AC characteristics on a chip of a semiconductor device in a batch.

2. 발명이 해결하려고 하는 기술적 과제2. The technical problem to be solved by the invention

모든 반도체 제품의 설계회로에 쉽게 포함시키도록 하여 모든 반도체 제품의 칩상의 AC특성을 일괄되게 분석, 평가하게 함으로써 공정의 안정도를 분석케 하고, 칩의 실패시에 설계의 문제인지, 공정 AC특성의 문제인지를 판단할 수 있게 하는 회로를 제공함.It can be easily included in the design circuits of all semiconductor products to analyze and evaluate the AC characteristics on all chips of a semiconductor product in a batch, thereby analyzing the stability of the process. Provides circuitry to determine if a problem

3. 발명의 해결방법의 요지3. Summary of Solution to Invention

DC파라메타 테스트를 위해 입력패드(405∼407)로부터 낸드게이트(408∼410)를 각각 연결하여 체인시켜 사용할 경우 입출력패드의 추가없이 딜레이셀(402)을 통한 AC모니터를 할 수 있다.When the NAND gates 408 to 410 are connected to and chained from the input pads 405 to 407 for the DC parameter test, an AC monitor can be performed through the delay cell 402 without adding an input / output pad.

4. 발명의 중요한 용도4. Important uses of the invention

반도체장치의 AC모니터 회로.AC monitor circuit of semiconductor device.

Description

반도체장치의 AC특성 감시회로AC characteristic monitoring circuit of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 회로도, 제2도는 제1도의 동작 파형도, 제3도는 제1도를 사용 적용 실시예시도.1 is a circuit diagram according to the present invention, FIG. 2 is an operating waveform diagram of FIG. 1, and FIG. 3 is a first diagram.

Claims (3)

반도체장치의 AC 모니터회로에 있어서, 테스트 입력단(TEST-IN)에 패드로부터 버퍼(301)를 통해 딜레이셀(302)을 연결하고, 상기 딜레이셀(302)의 출력단을 멀티 플렉서(304)의 제1입력단(A)에 연결하고, 정상 논리부(303)의 출력단을 상기 멀티 플렉서(303)의 제2입력단(B)에 연결하여 테스트 인에이블단(306)의 상태에 따라 상기 멀티 플렉서(303)에서 상기 제1, 2입력단(A,B)의 입력을 선택하여 출력패드(305)로 출력토록 구성됨을 특징으로 하는 반도체장치의 AC특성 감시회로.In an AC monitor circuit of a semiconductor device, a delay cell 302 is connected to a test input terminal TEST-IN from a pad through a buffer 301, and an output terminal of the delay cell 302 is connected to a multiplexer 304. The first input terminal A and an output terminal of the normal logic unit 303 to a second input terminal B of the multiplexer 303 to connect the multiple terminals according to the state of the test enable terminal 306. And a lexer (303) selects inputs of the first and second input terminals (A, B) and outputs them to an output pad (305). 제1항에 있어서, DC 따라 메트 테스트를 위해 입력패드(405∼407)로부터 낸드게이트(405∼407)를 하여 각각 연결 체인시켜 사용할 경우 입출력패드의 추가없이 딜레이칩(402) 통한 AC모니터를 할 수 있도록 더 추가함을 특징으로 하는 반도체장치의 AC특성 감시회로.According to claim 1, when the NAND gate (405 ~ 407) from the input pad (405 ~ 407) for the mat test according to the DC, the AC monitor through the delay chip 402 without the addition of input and output pads The AC characteristic monitoring circuit of the semiconductor device characterized by the above-mentioned. 제2항에 있어서, 딜레이셀(402)을 통해 출력되는 신호와 정상논리부(403)에서 발생되는 신호를 상기 정상논리부(403)에서 발생되는 신호에 따라 선택하여 AC모니터링을 할 수 있으며, 또다른 정상 논리부(413)를 통해 출력토록 더 추가함을 특징으로 하는 반도체장치의 AC특성 감시회로.The method of claim 2, wherein the signal output through the delay cell 402 and the signal generated from the normal logic unit 403 can be selected according to the signal generated by the normal logic unit 403 for AC monitoring, And the AC characteristic monitoring circuit of the semiconductor device further comprising an output through another normal logic unit (413). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950018987A 1995-06-30 1995-06-30 Ac characteristics monitoring circuit for semiconductor KR0163727B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950018987A KR0163727B1 (en) 1995-06-30 1995-06-30 Ac characteristics monitoring circuit for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950018987A KR0163727B1 (en) 1995-06-30 1995-06-30 Ac characteristics monitoring circuit for semiconductor

Publications (2)

Publication Number Publication Date
KR970002367A true KR970002367A (en) 1997-01-24
KR0163727B1 KR0163727B1 (en) 1999-03-20

Family

ID=19419393

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950018987A KR0163727B1 (en) 1995-06-30 1995-06-30 Ac characteristics monitoring circuit for semiconductor

Country Status (1)

Country Link
KR (1) KR0163727B1 (en)

Also Published As

Publication number Publication date
KR0163727B1 (en) 1999-03-20

Similar Documents

Publication Publication Date Title
KR900006484B1 (en) Semiconductor intergroted circuit
Shen et al. A 2-ns detecting time, 2-mu m CMOS built-in current sensing circuit
KR920702776A (en) Function monitoring device of electric / electronic switch
KR890001076A (en) Semiconductor integrated circuit device with gate array and memory
KR900005472A (en) Check buffer / register
NO20033051L (en) Test mode circuit for input / output continuity
US6260163B1 (en) Testing high I/O integrated circuits on a low I/O tester
KR970002367A (en) AC characteristic monitoring circuit of semiconductor device
DE3686989D1 (en) REDUCING NOISE DURING CHECKING INTEGRATED CIRCUIT CHIPS.
JPH0949866A (en) Integrated circuit
KR100344838B1 (en) bonding option circuit
KR940002724Y1 (en) Digital ic testing circuit for having multiple pin
US7017092B2 (en) On-chip design for monitor
TWI792543B (en) A method for checking power leakage of a circuit and a processing system thereof
JPS6484637A (en) Master slice type semiconductor device
KR970016614A (en) Test mode setting circuit of semiconductor device
JPH10123215A (en) Semiconductor integrated circuit
Balakrishnan et al. A simple array-based test structure for the AC variability characterization of MOSFETs
JPS6144372A (en) Apparatus for testing logical lsi
JPH08185762A (en) Pre-scaler ic test method and test probe card
Senthinathan et al. Electrical packaging requirements for low-voltage ICs-3.3 V high-performance CMOS devices as a case study
Jagau et al. Power distribution strategies based on current estimation and simulation of lossy transmission lines in conjunction with power isolation circuits
JPH11231023A (en) Semiconductor integrated circuit device and inspection method thereof
JPS6116519A (en) Testing process of integrated circuit
KR970008085B1 (en) Test method for semiconductor

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20060830

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee