KR960043641A - Improved ATM terminal card - Google Patents

Improved ATM terminal card Download PDF

Info

Publication number
KR960043641A
KR960043641A KR1019950012407A KR19950012407A KR960043641A KR 960043641 A KR960043641 A KR 960043641A KR 1019950012407 A KR1019950012407 A KR 1019950012407A KR 19950012407 A KR19950012407 A KR 19950012407A KR 960043641 A KR960043641 A KR 960043641A
Authority
KR
South Korea
Prior art keywords
data
bus
output
external
host
Prior art date
Application number
KR1019950012407A
Other languages
Korean (ko)
Inventor
윤성욱
Original Assignee
배순훈
대우전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 배순훈, 대우전자 주식회사 filed Critical 배순훈
Priority to KR1019950012407A priority Critical patent/KR960043641A/en
Publication of KR960043641A publication Critical patent/KR960043641A/en

Links

Landscapes

  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

본 발명은 개선된 ATM 단말카드에 관한 것으로, 호스트 CPU(21)와, 호스트 메모리(22), 버스 제어기(23)가 에스버스(24)상에 공통 접속되어 있고, 상기 에스버스(24)를 통해 호스트 메모리(22)로부터 데이타를 읽어와 ATM셀을 형성하며 전송할 데이타가 없으면 아이들 셀(Idle Cell)을 발생시키는 AAL 프로세서(31)와; 호스트로부터 전송할 데이타가 있으면 상기 AAL 프로세서(31) 의 출력을 선택하고, 상기 AAL 프로세서(31)의 아이들 셀 타이밍에는 외부단자(32)에서 입력되는 데이타를 선택하는 외부입력 인터페이스부(33); 상기 외부입력 인터페이스부(33)의 출력을 광신호로 변환하여 광선로(7)를 통해 출력하는 트랜시버(34)로 구성되어 별도의 복잡한 회로를 부가하지 않고서도, 아이들 셀 타이밍에 외부 데이타를 입력하여 전송할 수 있으므로 외부와 쉽게 인터페이스할 수 있다.The present invention relates to an improved ATM terminal card, wherein a host CPU (21), a host memory (22), and a bus controller (23) are commonly connected on an bus bus (24), and the bus bus (24) is connected. An AAL processor 31 which reads data from the host memory 22 to form an ATM cell and generates an idle cell if there is no data to transmit; An external input interface unit 33 for selecting an output of the AAL processor 31 when there is data to be transmitted from a host, and selecting data input from an external terminal 32 at an idle cell timing of the AAL processor 31; Transceiver 34 which converts the output of the external input interface unit 33 into an optical signal and outputs it through the optical path 7 to input external data at idle cell timing without adding a complicated circuit. Can be interfaced with external devices.

Description

개선된 에이티엠 단말카드Improved ATM terminal card

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도는 본 발명에 따른 개선된 ATM 단말카드를 도시한 블럭도, 제6도는 본 발명에 사용되는 아이들 셀의 포맷을 도시한 도면이다.3 is a block diagram showing an improved ATM terminal card according to the present invention, and FIG. 6 is a diagram showing the format of an idle cell used in the present invention.

Claims (2)

호스트 CPU(21)와, 호스트 메모리(22), 버스 제어기(23), ATM단말카드(30)가 에스버스(24)상에 공통접속되는 에스버스 시스템에 있어서, 상기 ATM 단말카드(30)가 상기 에스버스(24)를 통해 상기 호스트 메모리(22)로부터 데이타를 읽어와 ATM셀을 형성하며, 전송할 데이타가 없으면 아이들 셀(Idle Cell)을 발생시키는 AAL 프로세서(31)와; 호스트로부터 전송할 데이타가 있으면 상기 AAL 프로세서(31)의 출력을 선택하고, 상기 AAL 프로세서(31)의 아이들 셀 타이밍에는 외부단자(32)에서 입력되는 데이타를 선택하는 외부입력 인터페이스부(33); 및 상기 외부입력 인터페이스부(33)의 출력을 광신호로 변환하여 광선로(7)를 통해 출력하는 트랜시버(34)로 구성되는 것을 특징으로 하는 개선된 ATM 단말카드.In the bus system in which the host CPU 21, the host memory 22, the bus controller 23, and the ATM terminal card 30 are commonly connected on the bus 24, the ATM terminal card 30 is An AAL processor (31) which reads data from the host memory (22) via the bus (24) to form an ATM cell, and generates an idle cell if there is no data to transmit; An external input interface unit 33 for selecting an output of the AAL processor 31 when there is data to be transmitted from a host, and selecting data input from an external terminal 32 at an idle cell timing of the AAL processor 31; And a transceiver (34) for converting the output of the external input interface unit (33) into an optical signal and outputting the light through the optical path (7). 제1항에 있어서, 상기 외부입력 인터페이스부(33)는 상기 AAL 프로세서(31)로부터 입력되는 데이타를 소정 클럭 지연시키는 지연기(61)와; 상기 지연기(61)의 출력을 지연된 셀 시작(SOC)신호에 따라 소정의 아이들 셀 헤더와 비교하는 비교기(62); 및 상기 비교기(62)의 출력에 따라 상기 지연기(61)의 출력이나 외부입력을 선택하는 멀티플랙서(63)로 구성되는 것을 특징으로 하는 개선된 ATM 단말카드.The external input interface unit (33) according to claim 1, further comprising: a delay (61) for delaying a predetermined clock delay of data input from the AAL processor (31); A comparator (62) for comparing the output of the delay unit (61) with a predetermined idle cell header according to a delayed cell start (SOC) signal; And a multiplexer (63) for selecting the output or external input of the delay (61) in accordance with the output of the comparator (62). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950012407A 1995-05-18 1995-05-18 Improved ATM terminal card KR960043641A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950012407A KR960043641A (en) 1995-05-18 1995-05-18 Improved ATM terminal card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950012407A KR960043641A (en) 1995-05-18 1995-05-18 Improved ATM terminal card

Publications (1)

Publication Number Publication Date
KR960043641A true KR960043641A (en) 1996-12-23

Family

ID=66525507

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950012407A KR960043641A (en) 1995-05-18 1995-05-18 Improved ATM terminal card

Country Status (1)

Country Link
KR (1) KR960043641A (en)

Similar Documents

Publication Publication Date Title
KR970007654A (en) Method and apparatus for data transmission in a controller
KR910006875A (en) Image processing apparatus and image reduction circuit thereof
KR850003479A (en) Semiconductor integrated circuit
KR910014790A (en) Function Selection Method and Interface Circuit of Laptop Computer
KR960043641A (en) Improved ATM terminal card
KR910003475A (en) Sequence controller
KR940027383A (en) Bus multiplexing circuit
KR970009043A (en) Improved ATM terminal card
KR950033866A (en) Token Ring Control Bus Transmission Matching Device
KR960020168A (en) FIFO Read Circuit of Asynchronous Cell Adaptive Layer 3/4 Transmitter
KR960020172A (en) CPCS Trailer Processing Circuit of Asynchronous Cell Adaptive Layer 3/4 Transmitter
KR920013080A (en) Keyboard Connections and Methods for Terminals
KR970013938A (en) APPARATUS FOR REMOVING CELL OF AAL-1 LAYER
KR960018904A (en) Write Enable Signal Buffer Circuit
KR910010322A (en) Security Module Circuit Using RSA Algorithm
KR960015572A (en) Lead circuit of first-in, first-out buffer using EPLD
KR960009557A (en) Matching Circuit Using High Speed Parallel Synchronous Control Bus
KR930014087A (en) Low Speed Circuit Control and OAM Information Processor for 155Mbps Synchronous Transmission System
KR890003165A (en) Data transmission / reception control circuit of the built-in modem
KR960042441A (en) ID interface device
KR960027739A (en) Transmission buffer insertion path of SSCOP sublayer
KR960024803A (en) Clock signal input device of synchronous memory device
KR960012891A (en) Message Transmitter in Switching System
KR970049679A (en) Data receiving device of personal computer
JPH1117772A (en) Data processing method for magnetic card reader

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application