KR960035897A - Thin film transistor manufacturing method - Google Patents
Thin film transistor manufacturing method Download PDFInfo
- Publication number
- KR960035897A KR960035897A KR1019950005974A KR19950005974A KR960035897A KR 960035897 A KR960035897 A KR 960035897A KR 1019950005974 A KR1019950005974 A KR 1019950005974A KR 19950005974 A KR19950005974 A KR 19950005974A KR 960035897 A KR960035897 A KR 960035897A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- forming
- thin film
- film transistor
- drain
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 5
- 239000010409 thin film Substances 0.000 title claims abstract description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract 7
- 229920005591 polysilicon Polymers 0.000 claims abstract 7
- 238000000034 method Methods 0.000 claims abstract 5
- 239000003963 antioxidant agent Substances 0.000 claims abstract 3
- 230000003078 antioxidant effect Effects 0.000 claims abstract 3
- 239000012535 impurity Substances 0.000 claims abstract 2
- 230000001590 oxidative effect Effects 0.000 claims abstract 2
- 150000004767 nitrides Chemical group 0.000 claims 2
- 230000003064 anti-oxidating effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
본 발명은 게이트 전극(2), 게이트 산화층(3)을 형성하는 공정을 포함하는 박막 트랜지스터 제조방법에 있어서, 전체구조 상부에 채널 및 소스, 드레인이 형성될 부위에 폴리실리콘층(4) 패턴을 형성하는 단계; 전체구조 표면에 산화방지층(5)를 형성한 후, 상기 폴리실리콘층(4)의 예정된 부위에 불순물을 주입하여 소스, 드레인을 형성하는 단계; 및 상기 산화방지층(5)의 채널이 형성될 부위를 제거한 후, 상기 폴리실리콘층(4)의 노출되는 부위를 일정 두께 산화시키는 단계를 포함하여 이루어지는 것을 특징으로 하며, 오프 전류는 감소시키고, 온 전류는 증가시키면서, 동시에 소스, 드레인의 저항을 감소시킬 수 있고, 또한 수분이 소자특성에 미치는 영향을 최소화할 수 있는 박막 트랜지스터 제조방법에 관한 것이다.In the method of manufacturing a thin film transistor including the process of forming the gate electrode (2) and the gate oxide layer (3), the polysilicon layer (4) pattern is formed on a portion where a channel, a source, and a drain are to be formed on the entire structure. Forming; Forming an anti-oxidation layer (5) on the surface of the entire structure, and then implanting impurities into a predetermined portion of the polysilicon layer (4) to form a source and a drain; And removing the portion where the channel of the antioxidant layer 5 is to be formed, and then oxidizing the exposed portion of the polysilicon layer 4 by a predetermined thickness, and reducing the off current. The present invention relates to a method of manufacturing a thin film transistor which can increase the current and at the same time reduce the resistance of the source and drain, and also minimize the influence of moisture on the device characteristics.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1A도 내지 제1E도는 본 발명에 따른 박막 트랜지스터의 제조 과정도.1A to 1E are manufacturing process diagrams of a thin film transistor according to the present invention.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950005974A KR0147705B1 (en) | 1995-03-21 | 1995-03-21 | Method for manufacturing thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950005974A KR0147705B1 (en) | 1995-03-21 | 1995-03-21 | Method for manufacturing thin film transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960035897A true KR960035897A (en) | 1996-10-28 |
| KR0147705B1 KR0147705B1 (en) | 1998-11-02 |
Family
ID=19410274
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950005974A KR0147705B1 (en) | 1995-03-21 | 1995-03-21 | Method for manufacturing thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR0147705B1 (en) |
-
1995
- 1995-03-21 KR KR1019950005974A patent/KR0147705B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR0147705B1 (en) | 1998-11-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20100423 Year of fee payment: 13 |
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| LAPS | Lapse due to unpaid annual fee |