KR960026884A - Mask ROM and Manufacturing Method - Google Patents

Mask ROM and Manufacturing Method Download PDF

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Publication number
KR960026884A
KR960026884A KR1019940035043A KR19940035043A KR960026884A KR 960026884 A KR960026884 A KR 960026884A KR 1019940035043 A KR1019940035043 A KR 1019940035043A KR 19940035043 A KR19940035043 A KR 19940035043A KR 960026884 A KR960026884 A KR 960026884A
Authority
KR
South Korea
Prior art keywords
forming
mask rom
conductive layer
entire structure
gate electrodes
Prior art date
Application number
KR1019940035043A
Other languages
Korean (ko)
Inventor
황준
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940035043A priority Critical patent/KR960026884A/en
Publication of KR960026884A publication Critical patent/KR960026884A/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers

Abstract

본 발명은 마스크 롬에 있어서, 서로 인접하게 형성되되, 소스나 드레인 형성 없이도 유기된 채널간 전류도통이 가능하도록 형성된 다수의 게이트 전극(13,16)을 포함하는 것을 특징으로 하여, 패턴간 간격을 보다 좁게 형성시킬 수 있어 고집적 반도체 소자를 제조할 수 있고, 소스 및 드레인 영역을 반드시 형성할 필요가 없어 공정을 단순화시킴으로써 생산성 및 수율을 향상시킬 수 있는 특유의 효과가 있는 마스크 롬 및 그 제조방법에 관한 것이다.The present invention is characterized in that the mask ROM includes a plurality of gate electrodes 13 and 16 which are formed adjacent to each other and are capable of conducting current conduction between channels without forming a source or a drain. It is possible to form a narrower semiconductor device can be formed more narrowly, and the source and drain regions do not necessarily need to form a mask ROM with a unique effect that can improve the productivity and yield by simplifying the process and its manufacturing method It is about.

Description

마스크 롬 및 그 제조방법Mask ROM and Manufacturing Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A도 내지 제2C도는 본 발명의 일실시예에 따른 마스크 롬의 제조 공정 단면도.2A through 2C are cross-sectional views of a manufacturing process of a mask ROM according to an embodiment of the present invention.

Claims (6)

마스크 롬에 있어서, 서로 인접하게 형성되되, 소스나 드레인 형성 없이도 유기된 채널간 전류도통이 가능하도록 형성된 다수의 게이트 전극을 포함하는 것을 특징으로 하는 마스크 롬.A mask ROM, comprising: a plurality of gate electrodes formed adjacent to each other, the gate electrodes being configured to enable conduction between induced channels without forming a source or a drain. 제1항에 있어서, 상기 각 게이트 전극 사이에, 절연층을 더 구비하는 것을 특징으로 하는 마스크 롬.The mask rom of claim 1, further comprising an insulating layer between each of the gate electrodes. 서로 인접하게 형성되되, 소스나 드레인 형성 없이도 유기된 채널간 전류도통이 가능하도록 형성된 다수의 게이트 전극을 포함하는 마스크 롬 제조방법에 잇어서, 반도체 기판 상에 제1절연층, 제1전도층을 형성한 후, 패터닝 하는 단계; 전체구조 표면이나 예정된 부위의 표면에 제2절연층을 형성하는 단계; 전체구조 상부에 제2전도층을 형성하는 단계; 전체구조를 에치백하는 단계를 포함하는 것을 특징으로 하는 마스크 롬 제조방법.In the mask ROM manufacturing method including a plurality of gate electrodes formed adjacent to each other, and formed so as to enable the current conduction between the channels without forming a source or a drain, forming a first insulating layer, a first conductive layer on a semiconductor substrate After, patterning; Forming a second insulating layer on the entire structure surface or the surface of the predetermined portion; Forming a second conductive layer on the entire structure; Mask ROM manufacturing method comprising the step of etching the entire structure. 제3항에 있어서, 상기 전체구조 상부에 제2전도층을 형성하는 단계 수행 후, 상기 제2전도층 상에 감광막을 형성시키는 단계를 더 포함하는 것을 특징으로 하는 마스크 롬 제조방법.The method of claim 3, further comprising forming a photoresist film on the second conductive layer after performing the second conductive layer on the entire structure. 제3항에 있어서, 상기 전체구조 상부에 제2전도층을 형성하는 단계 수행 후, 상기 제2전도층 상에 평탄화층을 형성시키는 단계를 더 포함하는 것을 특징으로 하는 마스크 롬 제조방법.The method of claim 3, further comprising forming a planarization layer on the second conductive layer after performing the second conductive layer on the entire structure. 제3항에 있어서, 상기 제2전도층은 3000내지 5000A의 두께로 형성하는 것을 특징으로 하는 마스크 롬 제조방법.4. The method of claim 3, wherein the second conductive layer is formed to a thickness of 3000 to 5000A. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940035043A 1994-12-19 1994-12-19 Mask ROM and Manufacturing Method KR960026884A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940035043A KR960026884A (en) 1994-12-19 1994-12-19 Mask ROM and Manufacturing Method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940035043A KR960026884A (en) 1994-12-19 1994-12-19 Mask ROM and Manufacturing Method

Publications (1)

Publication Number Publication Date
KR960026884A true KR960026884A (en) 1996-07-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940035043A KR960026884A (en) 1994-12-19 1994-12-19 Mask ROM and Manufacturing Method

Country Status (1)

Country Link
KR (1) KR960026884A (en)

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