KR960026412A - Gettering method of semiconductor device buried layer - Google Patents

Gettering method of semiconductor device buried layer Download PDF

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Publication number
KR960026412A
KR960026412A KR1019940035736A KR19940035736A KR960026412A KR 960026412 A KR960026412 A KR 960026412A KR 1019940035736 A KR1019940035736 A KR 1019940035736A KR 19940035736 A KR19940035736 A KR 19940035736A KR 960026412 A KR960026412 A KR 960026412A
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South Korea
Prior art keywords
buried layer
layer
semiconductor substrate
gettering
investment
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KR1019940035736A
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Korean (ko)
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KR0137548B1 (en
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나금주
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김주용
현대전자산업 주식회사
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Priority to KR1019940035736A priority Critical patent/KR0137548B1/en
Publication of KR960026412A publication Critical patent/KR960026412A/en
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Publication of KR0137548B1 publication Critical patent/KR0137548B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

본 발명은 반도체 기판상에 이온주입되어 도핑된 영역이 매몰층 내부의 미세결함이나 금속성 물질을 매몰층 밖으로 게터링하는 방법에 있어서, 상기 메몰층 하부의 반도체 기판에 격자 손상된 결함을 형성하기 위하여 SiF3 이온을 상기 매몰층하부로 이온주입시키는 단계, 상기 매몰층 하부의 반도체 기판 결합으로 상기 매몰층 내부의 미세결함이나 금속성 물질이 게터링되도록 열공정을 실시하는 단계를 포함하는 것을 특징으로 하는 반도체 소자 매몰층의 게터링 방법에 관한 것으로,상기 설명과 같은 본 발명은 종래 Si, C, O 등과 같은 원소와 달리 SiF3는 SiF4 가스 소오스로 부터 쉽게 다량의 빔커런트를 확보할 수 있고, 한개의 이온 분자가 Si, C, O 등의 원소에 비하여 3배 이상의 게더링 효과를 나타내므로 짧은 시간의 이온주입으로도 동일한 게더링 효과를 볼 수 있으며, F를 이용한 게더링 방법은 F가 실리콘과 결합시 짧은 결합거리로(Si와 Si의 결합거리에 비하여 약 80% 짧음) 스트레스를 유발하여 자체 스트레스의 완화를 위하여 미세결함이나 금속성물질을 강하게 게더링 하는 효과가 있다.The present invention relates to a method for gettering a fine defect or a metallic material inside an investment layer out of an investment layer by ion implanted and doped regions on a semiconductor substrate, in order to form lattice damaged defects in the semiconductor substrate under the investment layer. Implanting ions into the bottom of the buried layer, and performing a thermal process to getter the fine defects or the metallic material inside the buried layer by bonding the semiconductor substrate under the buried layer. The present invention relates to a gettering method of the buried layer, the present invention as described above, unlike conventional elements such as Si, C, O, SiF3 can easily secure a large amount of beam current from the SiF4 gas source, one ion molecule Has more than three times the gathering effect compared to elements such as Si, C, O, etc. Gathering method using F is a short bonding distance when F is bonded with silicon (about 80% shorter than Si and Si bonding distance), causing stress, so as to reduce micro-defects or metallic It has a strong gathering effect.

Description

반도체 소자 매몰층의 게터링 방법Gettering method of semiconductor device buried layer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1E도는 본 발명에 따른 게터링 방법을 나타내는 개념도.1A to 1E are conceptual views showing a gettering method according to the present invention.

Claims (3)

반도체 기판상에 이온주입되어 도핑된 영역인 매몰층 내부의 미세결함이나 금속성 물질을 매몰층 밖으로 게터링하는 방법에 있어서, 상기 매몰층 하부의 반도체 기판에 격자 손상된 결함을 형성하기 위하여 SiF3 이온을 상기 매몰층 하부로 이온주입시키는 단계, 상기 매몰층 하부의 반도체 기판 결함으로 상기 매몰층 내부의 미세결함이나 금속성 물질이 게터링되도록 열공정을 실시하는 단계를 포함하는 것을 특징으로 하는 반도체 소자 매몰층의 게터링 방법.In the method of gettering microdefects or metallic materials in an investment layer, which is a doped region doped with ion implants on a semiconductor substrate, out of the investment layer, SiF 3 ions are formed to form lattice damaged defects in the semiconductor substrate under the investment layer. Implanting a lower portion of the buried layer, and performing a thermal process to get a micro defect or a metallic material inside the buried layer due to a semiconductor substrate defect below the buried layer. Gettering method. 제1항에 있어서, 상기 SiF3 이온주입은 3MeV 이상의 고에너지로 실시하는 것을 특징으로 하는 반도체 소자 매몰층의 게터링 방법.The method of claim 1, wherein the SiF 3 ion implantation is performed at a high energy of 3 MeV or more. 제1항에 있어서, 상기 열공정은 900~1000℃에서 1~2시간 동안 실시하는 것을 특징으로 하는 반도체 소자 매몰층의 게터링 방법.The gettering method of claim 1, wherein the thermal process is performed at 900 to 1000 ° C. for 1 to 2 hours. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940035736A 1994-12-21 1994-12-21 Getting method of semiconductor device KR0137548B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940035736A KR0137548B1 (en) 1994-12-21 1994-12-21 Getting method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940035736A KR0137548B1 (en) 1994-12-21 1994-12-21 Getting method of semiconductor device

Publications (2)

Publication Number Publication Date
KR960026412A true KR960026412A (en) 1996-07-22
KR0137548B1 KR0137548B1 (en) 1998-06-01

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KR1019940035736A KR0137548B1 (en) 1994-12-21 1994-12-21 Getting method of semiconductor device

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