KR960026363A - Method of forming gate insulating film of semiconductor device - Google Patents

Method of forming gate insulating film of semiconductor device Download PDF

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Publication number
KR960026363A
KR960026363A KR1019940039480A KR19940039480A KR960026363A KR 960026363 A KR960026363 A KR 960026363A KR 1019940039480 A KR1019940039480 A KR 1019940039480A KR 19940039480 A KR19940039480 A KR 19940039480A KR 960026363 A KR960026363 A KR 960026363A
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KR
South Korea
Prior art keywords
gate insulating
insulating film
semiconductor device
tlc
forming gate
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Application number
KR1019940039480A
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Korean (ko)
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KR100305201B1 (en
Inventor
주문식
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940039480A priority Critical patent/KR100305201B1/en
Publication of KR960026363A publication Critical patent/KR960026363A/en
Application granted granted Critical
Publication of KR100305201B1 publication Critical patent/KR100305201B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02249Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by combined oxidation and nitridation performed simultaneously

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

본 발명은 질화산화막 형성시 N2O에 수%~수십% 정도의 TLC를 혼합하고, 이때 생성된 H2O와 Cl2를 이용하여 성장비를 증가시키고, 금속이온을 게터링(gattering)하므로써 질화산화막의 특성을 향상시킬 수 있는 게이트 절연막 형성방법에 관한 것이다.The present invention mixes TLC of several% to several ten percent with N 2 O when forming the nitride oxide film, and increases the growth rate by using the generated H 2 O and Cl 2 by obtaining a metal ion gettering (gattering) A method of forming a gate insulating film capable of improving the characteristics of a nitride oxide film.

Description

반도체 소자의 게이트 절연막 형성방법Method of forming gate insulating film of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 반도체 소자의 게이트 절연막 형성방법을 설명하기 위한 단면도.1 is a cross-sectional view for explaining a method of forming a gate insulating film of a semiconductor device according to the present invention.

Claims (4)

반도체 소자의 게이트 절연막 형성방법에 있어서, 게이트 절연막으로 사용되는 질화산화막을 형성하기 위해 N2O에 화학용액을 혼합하여 사용하는 것을 특징으로 하는 반도체 소자의 게이트 절연막 형성방법.A method for forming a gate insulating film of a semiconductor device, wherein the chemical solution is mixed with N 2 O to form a nitride oxide film used as the gate insulating film. 제1항에 있어서, 상기 N2O 및 화학용액의 혼합에 의한 반응식은 아래와 같이 구성되는 것을 특징으로 하는 반도체 소자의 게이트 절연막 형성방법.The method of claim 1, wherein the reaction scheme by mixing the N 2 O and the chemical solution is configured as follows. 7N2O+TLC(C2H2Cℓ2)→7N2+O2+2CO2+H2O+Cℓ2 7N 2 O + TLC (C 2 H 2 Cℓ 2 ) → 7N 2 + O 2 + 2CO 2 + H 2 O + Cℓ 2 제1항에 있어서, 상기 화학용액은 TLC, TCA 또는 HCℓ을 사용하여 H2O 및 Cℓ2를 생성시키는 것을특징으로 하는 반도체 소자의 게이트 절연막 형성방법.The method of claim 1, wherein the chemical solution generates H 2 O and Cl 2 using TLC, TCA, or HCℓ. 제1항에 있어서, 상기 N2O에 TLC를 혼합하여 사용할 때 사용온도가 800~1000℃이고 압력이 40~400Torr인 것을 특징으로 하는 반도체 소자의 게이트 절연막 형성방법.The method of claim 1, wherein the use temperature is 800 to 1000 ° C. and the pressure is 40 to 400 Torr when the TLC is mixed with the N 2 O. 3 . ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940039480A 1994-12-30 1994-12-30 Method for forming gate insulating layer of semiconductor device KR100305201B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940039480A KR100305201B1 (en) 1994-12-30 1994-12-30 Method for forming gate insulating layer of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940039480A KR100305201B1 (en) 1994-12-30 1994-12-30 Method for forming gate insulating layer of semiconductor device

Publications (2)

Publication Number Publication Date
KR960026363A true KR960026363A (en) 1996-07-22
KR100305201B1 KR100305201B1 (en) 2001-12-01

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940039480A KR100305201B1 (en) 1994-12-30 1994-12-30 Method for forming gate insulating layer of semiconductor device

Country Status (1)

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KR (1) KR100305201B1 (en)

Also Published As

Publication number Publication date
KR100305201B1 (en) 2001-12-01

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