KR960026255A - - Google Patents
Info
- Publication number
- KR960026255A KR960026255A KR19950059698A KR19950059698A KR960026255A KR 960026255 A KR960026255 A KR 960026255A KR 19950059698 A KR19950059698 A KR 19950059698A KR 19950059698 A KR19950059698 A KR 19950059698A KR 960026255 A KR960026255 A KR 960026255A
- Authority
- KR
- South Korea
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/62—Electrodes ohmically coupled to a semiconductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33871994 | 1994-12-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR960026255A true KR960026255A (en, 2012) | 1996-07-22 |
Family
ID=18320821
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR19950059698A Ceased KR960026255A (en, 2012) | 1994-12-28 | 1995-12-27 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US5691571A (en, 2012) |
| KR (1) | KR960026255A (en, 2012) |
| CN (1) | CN1088912C (en, 2012) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6239029B1 (en) | 1995-07-17 | 2001-05-29 | Micron Technology, Inc. | Sacrificial germanium layer for formation of a contact |
| US5644166A (en) | 1995-07-17 | 1997-07-01 | Micron Technology, Inc. | Sacrificial CVD germanium layer for formation of high aspect ratio submicron VLSI contacts |
| US6420786B1 (en) | 1996-02-02 | 2002-07-16 | Micron Technology, Inc. | Conductive spacer in a via |
| US5789317A (en) | 1996-04-12 | 1998-08-04 | Micron Technology, Inc. | Low temperature reflow method for filling high aspect ratio contacts |
| US5843839A (en) * | 1996-04-29 | 1998-12-01 | Chartered Semiconductor Manufacturing, Ltd. | Formation of a metal via using a raised metal plug structure |
| US5662788A (en) * | 1996-06-03 | 1997-09-02 | Micron Technology, Inc. | Method for forming a metallization layer |
| US7126195B1 (en) | 1996-06-03 | 2006-10-24 | Micron Technology, Inc. | Method for forming a metallization layer |
| US6331482B1 (en) * | 1996-06-26 | 2001-12-18 | Micron Technology, Inc. | Method of VLSI contact, trench, and via filling using a germanium underlayer with metallization |
| US6309971B1 (en) | 1996-08-01 | 2001-10-30 | Cypress Semiconductor Corporation | Hot metallization process |
| US6016012A (en) * | 1996-11-05 | 2000-01-18 | Cypress Semiconductor Corporation | Thin liner layer providing reduced via resistance |
| TW358964B (en) * | 1996-11-21 | 1999-05-21 | Applied Materials Inc | Method and apparatus for improving sidewall coverage during sputtering in a chamber having an inductively coupled plasma |
| US6451179B1 (en) * | 1997-01-30 | 2002-09-17 | Applied Materials, Inc. | Method and apparatus for enhancing sidewall coverage during sputtering in a chamber having an inductively coupled plasma |
| US5844318A (en) * | 1997-02-18 | 1998-12-01 | Micron Technology, Inc. | Aluminum film for semiconductive devices |
| US5874356A (en) * | 1997-02-28 | 1999-02-23 | Taiwan Semiconductor Manufacturing Co. Ltd. | Method for forming zig-zag bordered openings in semiconductor structures |
| JP3456391B2 (ja) * | 1997-07-03 | 2003-10-14 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| US6054768A (en) * | 1997-10-02 | 2000-04-25 | Micron Technology, Inc. | Metal fill by treatment of mobility layers |
| US6110829A (en) * | 1997-10-23 | 2000-08-29 | Advanced Micro Devices, Inc. | Ultra-low temperature Al fill for sub-0.25 μm generation of ICs using an Al-Ge-Cu alloy |
| US5976928A (en) * | 1997-11-20 | 1999-11-02 | Advanced Technology Materials, Inc. | Chemical mechanical polishing of FeRAM capacitors |
| US6376369B1 (en) | 1998-02-12 | 2002-04-23 | Micron Technology, Inc. | Robust pressure aluminum fill process |
| US6638856B1 (en) * | 1998-09-11 | 2003-10-28 | Cypress Semiconductor Corporation | Method of depositing metal onto a substrate |
| US6056864A (en) * | 1998-10-13 | 2000-05-02 | Advanced Micro Devices, Inc. | Electropolishing copper film to enhance CMP throughput |
| US6195873B1 (en) * | 1999-09-08 | 2001-03-06 | Advanced Micro Devices, Inc. | Method for decreasing contact resistance |
| JP3449333B2 (ja) | 2000-03-27 | 2003-09-22 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| JP3480416B2 (ja) | 2000-03-27 | 2003-12-22 | セイコーエプソン株式会社 | 半導体装置 |
| DE10032792A1 (de) | 2000-06-28 | 2002-01-17 | Infineon Technologies Ag | Verfahren zur Herstellung einer Verdrahtung für Kontaktlöcher |
| US7423347B2 (en) * | 2006-01-19 | 2008-09-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | In-situ deposition for cu hillock suppression |
| US20080119044A1 (en) * | 2006-11-22 | 2008-05-22 | Macronix International Co., Ltd. | Systems and methods for back end of line processing of semiconductor circuits |
| US8304909B2 (en) * | 2007-12-19 | 2012-11-06 | Intel Corporation | IC solder reflow method and materials |
| CN102339787A (zh) * | 2010-07-20 | 2012-02-01 | 旺宏电子股份有限公司 | 降低接触孔电阻的半导体元件制造方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS553713B2 (en, 2012) * | 1976-01-30 | 1980-01-26 | ||
| US4910580A (en) * | 1987-08-27 | 1990-03-20 | Siemens Aktiengesellschaft | Method for manufacturing a low-impedance, planar metallization composed of aluminum or of an aluminum alloy |
| US5254872A (en) * | 1989-03-14 | 1993-10-19 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
| JP2841976B2 (ja) * | 1990-11-28 | 1998-12-24 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| JPH04196420A (ja) * | 1990-11-28 | 1992-07-16 | Nec Corp | 半導体装置の構造及び製造方法 |
| DE4200809C2 (de) * | 1991-03-20 | 1996-12-12 | Samsung Electronics Co Ltd | Verfahren zur Bildung einer metallischen Verdrahtungsschicht in einem Halbleiterbauelement |
| US5270254A (en) * | 1991-03-27 | 1993-12-14 | Sgs-Thomson Microelectronics, Inc. | Integrated circuit metallization with zero contact enclosure requirements and method of making the same |
| JPH05121727A (ja) * | 1991-10-25 | 1993-05-18 | Nec Corp | 半導体装置及びその製造方法 |
| JPH05198525A (ja) * | 1992-01-21 | 1993-08-06 | Sony Corp | 配線構造及び配線の形成方法 |
| JP2560637B2 (ja) * | 1994-04-28 | 1996-12-04 | 日本電気株式会社 | 電界効果トランジスタ及びその製造方法 |
| US5523259A (en) * | 1994-12-05 | 1996-06-04 | At&T Corp. | Method of forming metal layers formed as a composite of sub-layers using Ti texture control layer |
| JPH0955425A (ja) * | 1995-08-10 | 1997-02-25 | Mitsubishi Electric Corp | 多層Ａｌ配線構造を有する半導体装置およびその製造方法 |
| US5616519A (en) * | 1995-11-02 | 1997-04-01 | Chartered Semiconductor Manufacturing Pte Ltd. | Non-etch back SOG process for hot aluminum metallizations |
-
1995
- 1995-12-26 US US08/578,318 patent/US5691571A/en not_active Expired - Lifetime
- 1995-12-27 KR KR19950059698A patent/KR960026255A/ko not_active Ceased
- 1995-12-28 CN CN95119100A patent/CN1088912C/zh not_active Expired - Fee Related
-
1997
- 1997-08-12 US US08/910,020 patent/US6114244A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CN1132410A (zh) | 1996-10-02 |
| US5691571A (en) | 1997-11-25 |
| US6114244A (en) | 2000-09-05 |
| CN1088912C (zh) | 2002-08-07 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19951227 |
|
| PG1501 | Laying open of application | ||
| A201 | Request for examination | ||
| PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 20001013 Comment text: Request for Examination of Application Patent event code: PA02011R01I Patent event date: 19951227 Comment text: Patent Application |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20020725 Patent event code: PE09021S01D |
|
| N231 | Notification of change of applicant | ||
| PN2301 | Change of applicant |
Patent event date: 20030222 Comment text: Notification of Change of Applicant Patent event code: PN23011R01D |
|
| E801 | Decision on dismissal of amendment | ||
| PE0801 | Dismissal of amendment |
Patent event code: PE08012E01D Comment text: Decision on Dismissal of Amendment Patent event date: 20030426 Patent event code: PE08011R01I Comment text: Amendment to Specification, etc. Patent event date: 20021025 Patent event code: PE08011R01I Comment text: Amendment to Specification, etc. Patent event date: 20001013 |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
Patent event date: 20030624 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20020725 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |