KR960013056A - Adaptive Quantization Device in Image Codec Device - Google Patents

Adaptive Quantization Device in Image Codec Device Download PDF

Info

Publication number
KR960013056A
KR960013056A KR1019940024377A KR19940024377A KR960013056A KR 960013056 A KR960013056 A KR 960013056A KR 1019940024377 A KR1019940024377 A KR 1019940024377A KR 19940024377 A KR19940024377 A KR 19940024377A KR 960013056 A KR960013056 A KR 960013056A
Authority
KR
South Korea
Prior art keywords
signal
quantization
output
outputting
output signal
Prior art date
Application number
KR1019940024377A
Other languages
Korean (ko)
Other versions
KR0136492B1 (en
Inventor
권동현
남재열
정주홍
안치득
Original Assignee
양승택
재단법인 한국전자통신연구소
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 양승택, 재단법인 한국전자통신연구소 filed Critical 양승택
Priority to KR1019940024377A priority Critical patent/KR0136492B1/en
Publication of KR960013056A publication Critical patent/KR960013056A/en
Application granted granted Critical
Publication of KR0136492B1 publication Critical patent/KR0136492B1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146—Data rate or code amount at the encoder output
    • H04N19/152—Data rate or code amount at the encoder output by measuring the fullness of the transmission buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/124—Quantisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/157—Assigned coding mode, i.e. the coding mode being predefined or preselected to be further used for selection of another element or parameter
    • H04N19/159—Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

본 발명은 버퍼상태에 따라 적응적으로 영상코덱장치에서의 적응적 양자화 장치에 관한 것으로, 변환된 계수 데이타를 좌로 쉬프트하는 제1쉬프트수단(205)과, 저장된 양자화 변수의 역을 출력하는 제1저장수단(204)과, 상기 제1쉬프트수단(205)의 출력신호와 양자화 변수를 곱해 역다중화하는 역다중화수단(206)과, 선형/비선형적 양자화 변수를 출력하는 테이블(208)과, 상기 테이블(203)의 출력신호를 이용하여 양자화단계를 조절하는 나눗셈수단과, 지연된 역다중화수단(206)의 출력신호를 받거나 상기 역다중화수단(206)의 출력신호에 나눗셈수단의 출력신호를 더해 입력받는 제1다중화수단(211)과, 소정의 DC성분 블럭당 첫째 화소값에 해당하는 값과 상기 제1다중화수단(211)의 출력신호를 받는 제2다중화수단(212)과, 인트라/논-인트라매크로블럭신호에 따라 영상신호의 번지를 출력하는 제2저장수단(213)과, 상기 제2다중화기(212)와 제2저장수단(213)의 출력신호를 곱하여 양자화 변수를 출력하는 곱셈수단(214)을 구비하는 것을 특징으로 한다.The present invention relates to an adaptive quantization device in an image codec device adaptively according to a buffer state, comprising: first shifting means 205 for shifting the transformed coefficient data to the left, and a first outputting inverse of the stored quantization variable. A storage means 204, demultiplexing means 206 for multiplying and demultiplexing the output signal of the first shifting means 205 with a quantization variable, a table 208 for outputting linear / nonlinear quantization variables, and A division means for adjusting the quantization step by using the output signal of the table 203 and receiving the output signal of the delayed demultiplexing means 206 or adding the output signal of the division means to the output signal of the demultiplexing means 206 and inputting it. Receiving first multiplexing means (211), a value corresponding to a first pixel value per predetermined DC component block, and second multiplexing means (212) receiving an output signal of the first multiplexing means (211), intra / non- In accordance with the intra macroblock signal A second storage means 213 for outputting the address of the phase signal, and multiplication means 214 for outputting a quantization variable by multiplying the output signals of the second multiplexer 212 and the second storage means 213; It is characterized by.

Description

영상코덱장치에서의 적응적 양자화 장치Adaptive Quantization Device in Image Codec Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 일반적인 영상신호의 블럭 구성도.1 is a block diagram of a general video signal.

제2도는 본 발명이 적용되는 영상코덱장치의 구성 블럭도.2 is a block diagram of a video codec apparatus to which the present invention is applied.

제3도는 본 발명에 따른 적응적 양자화 장치의 세부 구성도.3 is a detailed block diagram of an adaptive quantization device according to the present invention.

제4도는 본 발명에 사용된 신호의 타이밍도.4 is a timing diagram of a signal used in the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

11 : 입력메모리부 12 : 변환부11: input memory 12: converter

13 : 양자화부 14 : 율제어부13 quantization unit 14 rate control unit

15 : 가변길이 부호화부 16 : 역양자화부15 variable length encoder 16 inverse quantizer

17 : 역변환부 18 : 움직임추정 및 보상부17: inverse transform unit 18: motion estimation and compensation unit

19 : 버퍼부 201 : DC성분분리기19: buffer 201: DC component separator

202 : DC성분처리기 203 : 번지발생기202: DC component processor 203: address generator

204 : 제1PROM 205 : 제1쉬프트레지스터204: First PROM 205: First Shift Register

206 : 역다중화기 207 : 버퍼206: demultiplexer 207: buffer

208 : 테이블 209 : 제2쉬프트레지스터208: Table 209: Second Shift Register

210 : 제3쉬프트레지스터 211 : 제1다중화기210: third shift register 211: first multiplexer

212 : 제2다중화기 213 : 제2PROM212: second multiplexer 213: second PROM

214 : 곱셈기214: multiplier

Claims (2)

영상신호를 시간영역에서 공간영역으로 변환하는 변환부(12)로 부터 출력된 계수 데이타를 좌로 쉬프트하는 제1쉬프트수단(205)과, 상기 변환부(12)로 부터 인트라 매크로블럭신호 또는 논-인트라 매크로블럭신호를 제어신호로 하여 출력된 번지에 따라 저장된 양자화 변수의 역을 출력하는 제1저장수단(204)과, 상기 제1쉬프트수단(205)의 출력신호와 상기 저장부(204)로 부터 출력되는 양자화 변수의 역을 곱한 결과를 다수개의 출력선으로 내보내는 역다중화수단(206)과, 버퍼 충만도에 따라 율제어부(14)에서 출력되는 양자화 스케일선택신호를 제어신호로 하여 선형 또는 비선형적 양자화 변수를 출력하는 테이블(208)과, 상기 선형 또는 비선형적 양자화 변수를 이용하여 양자화 단계를 조절하도록 하는 나눗셈수단과, 논-인트라 매크로블럭신호를 받으면 제2지연기를 통해 상기 역다중화수단(206)의 출력신호를 입력받고, 인트라 매크로블럭신호를 받으면 상기 역다중화수단(206)의 출력신호와 상기 나눗셈수단의 출력신호를 더한 신호를 입력받아 다중화 하는 제1다중화수단(211)과, 상기 변환부(12)의 DC성분만 추출된 계수 데이타에서 소정의 블럭당 첫째 화소값에 해당하는 값과 상기 제1다중화수단(211)의 출력신호를 받아 다중화 하는 제2다중화수단(212)과, 상기 율제어부(14)의 양자화 변수가 저장되어 있어 인트라 또는 논-인트라매크로블럭신호에 따라 영상신호의 번지를 출력하는 제2저장수단(213)과, 상기 제2다중화기(212)와 제2저장수단(213)의 출력신호를 곱하여 양자화 변수를 출력하는 곱셈수단(214)을 구비하는 것을 특징으로 하는 영상코덱장치에서의 적응적 양자화장치.First shift means 205 for shifting coefficient data output from the transform unit 12 for converting the video signal from the time domain to the spatial domain; and an intra macroblock signal or a non- First storage means 204 for outputting the inverse of the stored quantization variable according to the address output by using the intra macroblock signal as a control signal, and the output signal of the first shift means 205 and the storage unit 204. Demultiplexing means (206) for outputting the result of multiplying the inverse of the quantization variable output from the multiple output lines and the quantization scale selection signal output from the rate controller 14 according to the buffer fullness as a control signal, linear or nonlinear A table 208 for outputting an inverse quantization variable, division means for adjusting the quantization step using the linear or nonlinear quantization variable, and a non-intra macroblock signal upon receipt of a non-intra macroblock signal. The output signal of the demultiplexing means 206 is input through the second delay unit, and when the intra macroblock signal is received, a signal obtained by adding the output signal of the demultiplexing means 206 and the output signal of the division means is multiplexed. The multiplexing means 211 and the DC component of the converter 12 receive the value corresponding to the first pixel value per predetermined block and the output signal of the first multiplexing means 211 and multiplex it. A second multiplexing means 212 and a quantization variable of the rate controller 14 to store the address of the image signal according to an intra or non-intra macro block signal, and And multiplication means (214) for outputting quantization variables by multiplying the output signals of the second multiplexer (212) and the second storage means (213). 제1항에 있어서, 상기 나눗셈수단은, 상기 테이블(208)로 부터 선형 또는 비선형적 양자화 변수를 받아 소정의 비트를 좌로 쉬프트하는 제2쉬프트수단(209)과, 상기 제2쉬프트수단(209)의 출력신호와 테이블(208)로 부터 제1지연기에 의해 지연된 선형 또는 비선형적 양자화 변수를 곱한 신호를 우로 소정의 비트를 쉬프트하는 제3쉬프트수단(210)을 구비하는 것을 특징으로 하는 영상코덱장치에서의 적응적 양자화장치.The method of claim 1, wherein the dividing means comprises: a second shift means 209 for shifting a predetermined bit to the left by receiving a linear or nonlinear quantization variable from the table 208, and the second shift means 209 And a third shift means (210) for shifting a predetermined bit from a signal multiplied by a linear or nonlinear quantization variable delayed by the first delay from the table (208) by the first signal. Adaptive Quantization in. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940024377A 1994-09-27 1994-09-27 Adaptive Quantization Device in Image Codec Device KR0136492B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940024377A KR0136492B1 (en) 1994-09-27 1994-09-27 Adaptive Quantization Device in Image Codec Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940024377A KR0136492B1 (en) 1994-09-27 1994-09-27 Adaptive Quantization Device in Image Codec Device

Publications (2)

Publication Number Publication Date
KR960013056A true KR960013056A (en) 1996-04-20
KR0136492B1 KR0136492B1 (en) 1998-11-16

Family

ID=19393645

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940024377A KR0136492B1 (en) 1994-09-27 1994-09-27 Adaptive Quantization Device in Image Codec Device

Country Status (1)

Country Link
KR (1) KR0136492B1 (en)

Also Published As

Publication number Publication date
KR0136492B1 (en) 1998-11-16

Similar Documents

Publication Publication Date Title
EP0639923B1 (en) Video format conversion apparatus for high definition television
KR920019105A (en) Device for encoding and decoding variable length data
KR970060947A (en) Method and apparatus for changing the resolution by direct DCT mapping
KR970063947A (en) Scalable MPEG2 Compliant Video Encoder
KR970019564A (en) Device and method for decoding digital video data
KR100564838B1 (en) Compressed video data stream processing method and apparatus
KR960013056A (en) Adaptive Quantization Device in Image Codec Device
KR960010199B1 (en) Digital signal processor chip control apparatus
KR960020509A (en) Decoding device that considers the moving direction of moving images in air concealment
KR0130446B1 (en) Two-dimensional inverse discrete cosine transform method and apparatus
KR940025336A (en) Movie Frame Rate Converter
KR960028543A (en) Video Coding Device Using Wavelet Transform
KR960028422A (en) NTC receiver capable of receiving air signals
KR100240329B1 (en) Motion image correction device of digital image
KR100357088B1 (en) Digital video decoder
KR970057866A (en) Horizontal Filter in Video Decoding Device
KR960028234A (en) Screen vertical magnification circuit and method
KR970019665A (en) Video encoder
KR100205375B1 (en) Video encoding device
KR950016343A (en) Motion compensation device applied to screen division structure
KR930003772A (en) Method of converting CIF production signal into NTSC video signal
KR950016342A (en) Two-dimensional inverse discrete cosine transform device
KR960036711A (en) Video signal coding device
KR970004865A (en) Video decoder circuit
KR960028450A (en) Video encoder

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19940927

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19940927

Comment text: Request for Examination of Application

PG1501 Laying open of application
E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 19971227

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 19980123

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 19980123

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
PR1001 Payment of annual fee

Payment date: 20001212

Start annual number: 4

End annual number: 4

PR1001 Payment of annual fee

Payment date: 20011228

Start annual number: 5

End annual number: 5

PR1001 Payment of annual fee

Payment date: 20021227

Start annual number: 6

End annual number: 6

PR1001 Payment of annual fee

Payment date: 20031231

Start annual number: 7

End annual number: 7

PR1001 Payment of annual fee

Payment date: 20041231

Start annual number: 8

End annual number: 8

PR1001 Payment of annual fee

Payment date: 20051216

Start annual number: 9

End annual number: 9

PR1001 Payment of annual fee

Payment date: 20070103

Start annual number: 10

End annual number: 10

FPAY Annual fee payment

Payment date: 20080103

Year of fee payment: 11

PR1001 Payment of annual fee

Payment date: 20080103

Start annual number: 11

End annual number: 11

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

Termination category: Default of registration fee

Termination date: 20091210