KR960006025A - Method of forming charge storage electrode of capacitor - Google Patents

Method of forming charge storage electrode of capacitor Download PDF

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Publication number
KR960006025A
KR960006025A KR1019940016833A KR19940016833A KR960006025A KR 960006025 A KR960006025 A KR 960006025A KR 1019940016833 A KR1019940016833 A KR 1019940016833A KR 19940016833 A KR19940016833 A KR 19940016833A KR 960006025 A KR960006025 A KR 960006025A
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KR
South Korea
Prior art keywords
charge storage
storage electrode
silicon
contact hole
undoped
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KR1019940016833A
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Korean (ko)
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KR0150049B1 (en
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임찬
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김주용
현대전자산업 주식회사
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Priority to KR1019940016833A priority Critical patent/KR0150049B1/en
Publication of KR960006025A publication Critical patent/KR960006025A/en
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Publication of KR0150049B1 publication Critical patent/KR0150049B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
    • H01L28/87—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 캐패시터의 전하저장전극 형성방법에 관한 것으로서, 도핑된 실리콘과 도핑되지 않은 실리콘의 습식식각비를 아용하고, 전하저장전극 콘택홀 형성시에 스페이서를 사용한 후 제거함으로서, 전하저장전극의 내부 및 외부의 측벽에 요철구조가 형성되어 제한된 면적하에서 전하저장전극의 유효면적을 극대화시킬 수 있는 캐패시터의 전하저장전극 형성방법을 개시한다.The present invention relates to a method for forming a charge storage electrode of a capacitor, which utilizes a wet etching ratio of doped silicon and undoped silicon, and removes the spacer after using the spacer in forming the contact hole. And a method of forming a charge storage electrode of a capacitor in which a concave-convex structure is formed on an outer sidewall to maximize an effective area of the charge storage electrode under a limited area.

Description

캐패시터의 전하저장전극 형성방법Method of forming charge storage electrode of capacitor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1F도는 본 발명에 의한 캐패시터의 전하저장전극 형성단계를 도시한 소자의 단면도.1F is a cross-sectional view of a device showing a charge storage electrode forming step of a capacitor according to the present invention.

Claims (4)

캐패시터의 전하저장전극 형성방법에 있어서, 소정의 공정을 거친 실리콘 기판(1)상에 BPSG로 층간질연막(3)을 형성하고, 상기 층간 절연막(3)상에 PSG(4)를 얇게 증착하는 단계와, 상기 단계로부터 전체구조 상부에 언도프트 실리콘과 도프트 실리콘을 다수층 비정질 상태로 적층하되 제1언도프트, 제1도프트, 제2언도프트, 제2도프트 및 제3언도프트 실리콘(5A,6A,5B,6B,5C)순으로 증착하는 단계와, 상기 단계로부터 전하저장전극 콘택 마스크를 이용하여 제1언도프트 실리콘(5A)이 노출될때까지 식각한 후 전체구조 상부에 질화막(7)을 증착하는 단계와, 상기 단계로부터 질화막(7) 식각공정을 실시하여 제1언도프트 실리콘(5A)상의 질화막(7)은 제거되도 제3언도프트 실리콘(5C)상의 질화막(7)은 일부 남게하는 단계와, 상기 단계로부터 건식식각공정으로 노출된 제1언도프트 실리콘(5A), PSG(4) 및 BPSG로 된 층간 절연막(3)을 순차적으로 식각하여 콘택홀을 형성하고, 콘택홀을 습식식각용액으로 처리하여 콘택홀 측벽으로부터 소정깊이까지 PSG(4)가 선택 식각되게 하는 단계와, 상기 단계로부터 전체구조상에 비전질의 제3도프트 실리콘(6C)을 증착하여 콘택홀을 채운후 블랭켓 식각공정으로 질화막 스페이서(7)의 상부가 드러나게하고, 이후 질화막 스페이서(7A)를 제거하는 단계와, 상기 단계로부터 전하저장전극 마스크를 이용하여 전하저장전극을 한정한 후, 질소분위기와 630~670℃의 온도에서 0.5~1,5시간동안 열처리하고, 언도프트 실리콘에 대해 도프트 실리콘의 식각율이 큰 실리콘식각용액에 처리하여 전하저장전극의 내, 외부가 요철구조가 되게 하는 단계로 이루어지는 것을 특징으로 하는 캐패시터의 전하저장전극 형성방법.In the method for forming a charge storage electrode of a capacitor, an interlayer thin film (3) is formed of BPSG on a silicon substrate (1) which has been subjected to a predetermined process, and a thin film of PSG (4) is deposited on the interlayer insulating film (3). And laminating undoped silicon and doped silicon in a multi-layer amorphous state over the entire structure from the step, wherein the first undoped, the first dope, the second undoped, the second dope and the third undoped silicon (5A, 6A, 5B, 6B, 5C), and etching from the step until the first undoped silicon 5A is exposed by using the charge storage electrode contact mask. 7) depositing the nitride film 7 on the first undoped silicon 5A by performing the step of etching the nitride film 7 from the above step and removing the nitride film 7 on the third undoped silicon 5C. Leaving some, and the first exposed from the dry etching process The interlayer insulating film 3 made of doped silicon 5A, PSG 4 and BPSG is sequentially etched to form a contact hole, and the contact hole is treated with a wet etching solution to form a PSG 4 from the sidewall of the contact hole to a predetermined depth. ) To selectively etch, and depositing the non-crystalline third doped silicon (6C) on the entire structure from the step to fill the contact hole, and then the blanket etching process to expose the upper portion of the nitride spacer 7 Removing the nitride film spacer 7A, defining the charge storage electrode using the charge storage electrode mask from the step, and heat-treating for 0.5 to 1,5 hours at a temperature of 630 to 670 ° C. with a nitrogen atmosphere. The charge storage electrode of the capacitor, characterized in that the step of processing the silicon etching solution having a large etching rate of the doped silicon to the inside and outside of the charge storage electrode to the concave-convex structure Formation method. 제1항에 있어서, 상기 콘택홀 형성후 콘택홀을 처리하는 습식식각용액은 BPSG(3)에 대해 PSG(4)의 식각율이 큰 NH4F:HF=50:1의 BOE 용액인 것을 특징으로 하는 캐패시터의 전하저장전극 형성방법.The wet etching solution for treating the contact hole after the contact hole is formed is a BOE solution of NH 4 F: HF = 50: 1 having a large etching rate of PSG (4) relative to BPSG (3). A charge storage electrode forming method of a capacitor. 제1항에 있어서, 상기 제3도프트 실리콘(6C)의 블랭켓 식각공정은 크로린계의 건식 식각기체를 사용하는 것을 특징으로 하는 캐패시터의 전하저장전극 형성방법.The method of claim 1, wherein the blanket etching process of the third doped silicon (6C) is a dry etching gas of a chlorine-based. 제1항에 있어서, 상기 실리콘 식각용액은 HNO3:CH3COOH :HF: DI =30 :3: 0.5:15.5의 비율로 된 것을 특징으로 하는 캐패시터의 전하저장전극 형성방법.The method of claim 1, wherein the silicon etching solution has a ratio of HNO 3 : CH 3 COOH: HF: DI = 30: 3: 0.5: 15.5. ※참고사항:최초출원 내용에 의하여 공개되는 것임.※ Note: The information is disclosed by the first application.
KR1019940016833A 1994-07-13 1994-07-13 Manufacturing method of charge storage electrode of capacitor KR0150049B1 (en)

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Application Number Priority Date Filing Date Title
KR1019940016833A KR0150049B1 (en) 1994-07-13 1994-07-13 Manufacturing method of charge storage electrode of capacitor

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Application Number Priority Date Filing Date Title
KR1019940016833A KR0150049B1 (en) 1994-07-13 1994-07-13 Manufacturing method of charge storage electrode of capacitor

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KR960006025A true KR960006025A (en) 1996-02-23
KR0150049B1 KR0150049B1 (en) 1998-10-01

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