KR960006005A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
KR960006005A
KR960006005A KR1019940018754A KR19940018754A KR960006005A KR 960006005 A KR960006005 A KR 960006005A KR 1019940018754 A KR1019940018754 A KR 1019940018754A KR 19940018754 A KR19940018754 A KR 19940018754A KR 960006005 A KR960006005 A KR 960006005A
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KR
South Korea
Prior art keywords
substrate
photoresist
photoresist pattern
pattern
manufacturing
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Application number
KR1019940018754A
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Korean (ko)
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KR100364710B1 (en
Inventor
이원상
Original Assignee
이헌조
엘지전자 주식회사
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Priority to KR1019940018754A priority Critical patent/KR100364710B1/en
Publication of KR960006005A publication Critical patent/KR960006005A/en
Application granted granted Critical
Publication of KR100364710B1 publication Critical patent/KR100364710B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28114—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

본 발명은 반도체 소자의 제조방법에 관한 것으로, 단순한 공정에 의해 특성이 향상된 T형 게이트구조를 가진 MESFET를 제조하기 위한 것이다. 본 발명은 기판상에 포토레지스트를 도포하는 단계와, 상기 포토레지스트에 게이트패턴을 전사시켜 오버행구조의 포토레지스트패턴을 형성하는 단계, 상기 포토레지스트패턴을 마스크로하여 기판을 리세스 에칭하는 단계, 상기 포토레지스트패턴 및 리세스 에칭된 기판부위 표면에 SiN을 증착하는 단계, 상기 SiN막을 이방성식각하여 기판 소정부위를 노출시키는 단계, 기판 전면에 금속을 각도증착하는 단계, 및 상기 포토레지스트패턴을 리프트오프하는 단계를 포함하여 이루어진 반도체소자 제조방법을 제공함으로써 게이트 길이가 감소된 T형 게이트를 용이하게 제조할 수 있도록 하며, 활성층의 표면상태가 안정된 우수한 특성의 MESFET가 구현되도록 한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and to manufacturing a MESFET having a T-type gate structure having improved characteristics by a simple process. The present invention comprises the steps of applying a photoresist on a substrate, transferring the gate pattern to the photoresist to form a photoresist pattern of the overhang structure, the step of recess etching the substrate using the photoresist pattern as a mask, Depositing SiN on the surface of the photoresist pattern and the recess etched substrate, anisotropically etching the SiN film to expose a predetermined portion of the substrate, angle depositing a metal on the entire surface of the substrate, and lifting the photoresist pattern By providing a semiconductor device manufacturing method comprising the step of turning off, it is possible to easily manufacture a T-type gate with a reduced gate length, and to implement a MESFET of excellent characteristics with a stable surface state of the active layer.

Description

반도체 소자의 제조방법Manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래의 T형 게이트구조를 가진 MESFET 제조방법을 도시한 공정순서도이다.1 is a process flowchart showing a conventional method for manufacturing a MESFET having a T-type gate structure.

제2도는 본 발명에 의해 T형 게이트구조를 가진 MESFET 제조방법을 도시한 공정순서도이다.2 is a process flowchart showing a method for manufacturing a MESFET having a T-type gate structure according to the present invention.

Claims (3)

기판상에 포토레지스트를 도포하는 단계와, 상기 포토레지스트에 게이트패턴을 전사시켜 오버행구조의 포토레지스트패턴을 형성하는 단계, 상기 포토레지스트패턴을 마스크로하여 기판을 리세스 에칭하는 단계, 상기 포토레지스트패턴 및 리세스 에칭된 기판부위 표면에 SiN을 증착하는 단계, 상기 SiN막을 이방성식각하여 기판 소정부위를 노출시키는 단계, 기판 전면에 금속을 각도증착하는 단계, 및 상기 포토레지스트패턴을 리프트오프하는 단계를 포함하여 이루어진 반도체소자 제조방법.Applying a photoresist on a substrate, transferring a gate pattern to the photoresist to form an overhanged photoresist pattern, recess etching the substrate using the photoresist pattern as a mask, and the photoresist Depositing SiN on the surface of the pattern and recess etched substrate, anisotropically etching the SiN film to expose a predetermined portion of the substrate, angularly depositing a metal on the entire surface of the substrate, and lifting off the photoresist pattern Semiconductor device manufacturing method comprising a. 제1항에 있어서, 상기 기판은 GaAs기판상에 GaAs버퍼층, n-GaAs층, n+-GaAs층이 차례로 성장된것임을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein a GaAs buffer layer, an n-GaAs layer, and an n + -GaAs layer are sequentially grown on the GaAs substrate. 제1항에 있어서, 상기 SiN막의 이방성식각에 의해 노출된 기판부위의 폭이 게이트길이가 되는 것을 특징으로 하는 반도체 소자의 제조방법.2. The method of claim 1, wherein the width of the substrate portion exposed by the anisotropic etching of the SiN film becomes a gate length. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940018754A 1994-07-29 1994-07-29 Method for manufacturing semiconductor device KR100364710B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940018754A KR100364710B1 (en) 1994-07-29 1994-07-29 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940018754A KR100364710B1 (en) 1994-07-29 1994-07-29 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
KR960006005A true KR960006005A (en) 1996-02-23
KR100364710B1 KR100364710B1 (en) 2003-02-25

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KR1019940018754A KR100364710B1 (en) 1994-07-29 1994-07-29 Method for manufacturing semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100744681B1 (en) * 2001-12-19 2007-08-01 주식회사 하이닉스반도체 A fabricating method of semiconductor device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4536942A (en) * 1982-12-09 1985-08-27 Cornell Research Foundation, Inc. Fabrication of T-shaped metal lines for semiconductor devices
US4599790A (en) * 1985-01-30 1986-07-15 Texas Instruments Incorporated Process for forming a T-shaped gate structure
JPH0228333A (en) * 1988-07-18 1990-01-30 Mitsubishi Electric Corp Manufacture of semiconductor device
KR910005400B1 (en) * 1988-09-05 1991-07-29 재단법인 한국전자통신연구소 Manufacturing method of self align gaas fet using multi layer photo resistor
JPH0684950A (en) * 1992-08-28 1994-03-25 New Japan Radio Co Ltd Manufacture of field effect transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100744681B1 (en) * 2001-12-19 2007-08-01 주식회사 하이닉스반도체 A fabricating method of semiconductor device

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